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SY100EP33VZITR Datasheet(PDF) 1 Page - Micrel Semiconductor |
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SY100EP33VZITR Datasheet(HTML) 1 Page - Micrel Semiconductor |
1 / 9 page 1 Precision Edge® SY10EP33V SY100EP33V Micrel, Inc. M9999-071906 hbwhelp@micrel.com or (408) 955-1690 CLK /CLK RESET Q /Q XX Z(2) LH LF F DESCRIPTION s Guaranteed maximum frequency >4GHz s 3.3V and 5V power supply options s Guaranteed propagation delay <460ps over temperature s Wide operating temperature range: –40 °C to +85°C s Available in 8-pin MSOP and SOIC packages The SY10/100EP33V is an integrated ÷4 divider. The V BB pin, an internally generated voltage supply, is available to this device only. For single-ended input conditions, the unused differential input is connected to V BB as a switching reference voltage. VBB may also rebias AC-coupled inputs. When used, decouple V BB to VCC via a 0.01 µF capacitor and limit current sourcing or sinking to 0.5mA. When not used, V BB should be left open. The reset pin is asynchronous and is asserted on the rising edge. Upon power-up, the internal flip-flops will attain a random state; the reset allows for the synchronous use of multiple EP33s in a system. The 100K Series includes internal temperature compensation circuitry. FEATURES PIN NAMES 5V/3.3V 4GHz, ÷ 4 PECL/LVPECL DIVIDER Pin Function CLK, /CLK ECL Clock Inputs with Internal 75k Ω Pull-Down Resistor, Default State is LOW RESET ECL Asynchronous Reset VBB Reference Voltage Output Q, /Q ECL Data Outputs Rev.: E Amendment: /0 Issue Date: July 2006 Precision Edge® SY10EP33V SY100EP33V TRUTH TABLE(1) Notes: 1. F = Divide by 4 function. 2. Z = Low to High transition. ECL Pro™ ECL Pro are trademarks of Micrel, Inc. Precision Edge is a registered trademarks of Micrel, Inc. |
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