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MRF1535NT1 Datasheet(PDF) 10 Page - Freescale Semiconductor, Inc |
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MRF1535NT1 Datasheet(HTML) 10 Page - Freescale Semiconductor, Inc |
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10 / 14 page  10 RF Device Data Freescale Semiconductor MRF1535NT1 MRF1535FNT1 APPLICATIONS INFORMATION DESIGN CONSIDERATIONS This device is a common-source, RF power, N-Channel enhancement mode, Lateral Metal -Oxide Semiconductor Field -Effect Transistor (MOSFET). Freescale Application Note AN211A, “FETs in Theory and Practice”, is suggested reading for those not familiar with the construction and char- acteristics of FETs. This surface mount packaged device was designed pri- marily for VHF and UHF mobile power amplifier applications. Manufacturability is improved by utilizing the tape and reel capability for fully automated pick and placement of parts. However, care should be taken in the design process to in- sure proper heat sinking of the device. The major advantages of Lateral RF power MOSFETs in- clude high gain, simple bias systems, relative immunity from thermal runaway, and the ability to withstand severely mis- matched loads without suffering damage. MOSFET CAPACITANCES The physical structure of a MOSFET results in capacitors between all three terminals. The metal oxide gate structure determines the capacitors from gate -to -drain (Cgd), and gate-to-source (Cgs). The PN junction formed during fab- rication of the RF MOSFET results in a junction capacitance from drain-to-source (Cds). These capacitances are charac- terized as input (Ciss), output (Coss) and reverse transfer (Crss) capacitances on data sheets. The relationships be- tween the inter-terminal capacitances and those given on data sheets are shown below. The Ciss can be specified in two ways: 1. Drain shorted to source and positive voltage at the gate. 2. Positive voltage of the drain in respect to source and zero volts at the gate. In the latter case, the numbers are lower. However, neither method represents the actual operating conditions in RF ap- plications. Drain Cds Source Gate Cgd Cgs Ciss = Cgd + Cgs Coss = Cgd + Cds Crss = Cgd DRAIN CHARACTERISTICS One critical figure of merit for a FET is its static resistance in the full-on condition. This on-resistance, RDS(on), occurs in the linear region of the output characteristic and is speci- fied at a specific gate-source voltage and drain current. The drain - source voltage under these conditions is termed VDS(on). For MOSFETs, VDS(on) has a positive temperature coefficient at high temperatures because it contributes to the power dissipation within the device. BVDSS values for this device are higher than normally re- quired for typical applications. Measurement of BVDSS is not recommended and may result in possible damage to the de- vice. GATE CHARACTERISTICS The gate of the RF MOSFET is a polysilicon material, and is electrically isolated from the source by a layer of oxide. The DC input resistance is very high - on the order of 109 Ω — resulting in a leakage current of a few nanoamperes. Gate control is achieved by applying a positive voltage to the gate greater than the gate-to-source threshold voltage, VGS(th). Gate Voltage Rating — Never exceed the gate voltage rating. Exceeding the rated VGS can result in permanent damage to the oxide layer in the gate region. Gate Termination — The gates of these devices are es- sentially capacitors. Circuits that leave the gate open-cir- cuited or floating should be avoided. These conditions can result in turn-on of the devices due to voltage build-up on the input capacitor due to leakage currents or pickup. Gate Protection — These devices do not have an internal monolithic zener diode from gate-to-source. If gate protec- tion is required, an external zener diode is recommended. Using a resistor to keep the gate-to-source impedance low also helps dampen transients and serves another important function. Voltage transients on the drain can be coupled to the gate through the parasitic gate-drain capacitance. If the gate-to-source impedance and the rate of voltage change on the drain are both high, then the signal coupled to the gate may be large enough to exceed the gate-threshold voltage and turn the device on. DC BIAS Since this device is an enhancement mode FET, drain cur- rent flows only when the gate is at a higher potential than the source. RF power FETs operate optimally with a quiescent drain current (IDQ), whose value is application dependent. This device was characterized at IDQ = 150 mA, which is the suggested value of bias current for typical applications. For special applications such as linear amplification, IDQ may have to be selected to optimize the critical parameters. The gate is a dc open circuit and draws no current. There- fore, the gate bias circuit may generally be just a simple re- sistive divider network. Some special applications may require a more elaborate bias system. GAIN CONTROL Power output of this device may be controlled to some de- gree with a low power dc control signal applied to the gate, thus facilitating applications such as manual gain control, ALC/AGC and modulation systems. This characteristic is very dependent on frequency and load line. |
Similar Part No. - MRF1535NT1_06 |
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Similar Description - MRF1535NT1_06 |
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