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NCV8506D2T33 Datasheet(PDF) 9 Page - ON Semiconductor |
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NCV8506D2T33 Datasheet(HTML) 9 Page - ON Semiconductor |
9 / 12 page NCV8506 Series http://onsemi.com 9 CIRCUIT DESCRIPTION REGULATOR CONTROL FUNCTIONS The NCV8506 contains the microprocessor compatible control function RESET (Figure 13). Figure 13. Reset and Delay Circuit Wave Forms VIN VOUT RESET DELAY (VDT) Threshold DELAY Threshold RESET Td Td RESET Function A RESET signal (low voltage) is generated as the IC powers up until VOUT is within 1.5% of the regulated output voltage, or when VOUT drops out of regulation,and is lower than 4.0% below the regulated output voltage. Hysteresis is included in the function to minimize oscillations. The RESET output is an open collector NPN transistor, controlled by a low voltage detection circuit. The circuit is functionally independent of the rest of the IC thereby guaranteeing that the RESET signal is valid for VOUT as low as 1.0 V. DELAY Function The reset delay circuit provides a programmable (by external capacitor) delay on the RESET output lead. The DELAY lead provides source current (typically 4.0 mA) to the external DELAY capacitor during the following proceedings: 1. During Power Up (once the regulation threshold has been verified). 2. After a reset event has occurred and the device is back in regulation. The DELAY capacitor is discharged when the regulation (RESET threshold) has been violated. This is a latched incident. The capacitor will fully discharge and wait for the device to regulate before going through the delay time event again. Voltage Adjust Figure 14 shows the device setup for a user configurable output voltage. The feedback to the VADJ pin is taken from a voltage divider referenced to the output voltage. The loop is balanced around the Unity Gain threshold (1.30 V typical). Figure 14. Adjustable Output Voltage VOUT VADJ NCV8506 15 k 5.1 k COUT ≈5.0 V 1.28 V APPLICATION NOTES SETTING THE DELAY TIME The delay time is controlled by the Reset Delay Low Voltage, Delay Switching Threshold, and the Delay Charge Current. The delay follows the equation: tDELAY + [CDELAY(Vdt * Reset Delay Low Voltage)] Delay Charge Current Example: Using CDELAY = 33 nF. Assume reset Delay Low Voltage = 0. Use the typical value for Vdt = 1.8 V (2.5 V, 3.3 V, and 5.0 V options). Use the typical value for Delay Charge Current = 4.2 mA. tDELAY + [33 nF(1.8 * 0)] 4.2 mA + 14 ms STABILITY CONSIDERATIONS The output or compensation capacitor helps determine three main characteristics of a linear regulator: start−up delay, load transient response and loop stability. The capacitor value and type should be based on cost, availability, size and temperature constraints. A tantalum or aluminum electrolytic capacitor is best, since a film or ceramic capacitor with almost zero ESR can cause instability. The aluminum electrolytic capacitor is the least expensive solution, but, if the circuit operates at low temperatures (−25 °C to −40°C), both the value and ESR of the capacitor will vary considerably. The capacitor manufacturers data sheet usually provides this information. |
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