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NCV8184DTRK Datasheet(PDF) 11 Page - ON Semiconductor |
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NCV8184DTRK Datasheet(HTML) 11 Page - ON Semiconductor |
11 / 13 page NCV8184 http://onsemi.com 11 0.1 1 10 100 0.000001 0.00001 0.0001 0.001 0.01 0.1 1 10 100 1000 t1 (s) Figure 30. DPAK 5−Lead Thermal Duty Cycle Curves on 1.0 in. Spreader Test Board (1.0 in pad PCB) Die Size = 2.08 x 1.55 x 0.40 5.0% Active Area 50% Duty Cycle 20% Single Pulse 10% 5% 2% 1% Duty Cycle, D = t 1 t 2 PDM Notes: t 1 t 2 0.1 1 10 100 1000 0.000001 0.00001 0.0001 0.001 0.01 0.1 1 10 100 1000 Time (s) Figure 31. DPAK 5−Lead Thermal Transient Response on Typical Test Boards min pad (Cu Area = 100 mm2) 1.0 in pad (Cu Area = 653 mm2) Die Size = 2.08 x 1.55 x 0.40 5.0% Active Area Junction Ambient (thermal ground) R1 R2 C1 C2 C3 Cn Rn R3 Time constants are not simple RC products. Amplitudes of mathematical solution are not the resistance values. Figure 32. Grounded Capacitor Thermal Network (“Cauer” Ladder) Figure 33. Non−Grounded Capacitor Thermal Ladder (“Foster” Ladder) Junction Ambient (thermal ground) R1 R2 C1 C2 C3 Cn Rn R3 Each rung is exactly characterized by its RC−product time constant; Amplitudes are the resistances |
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