Electronic Components Datasheet Search |
|
AT24C08N-10SA-5.0C Datasheet(PDF) 5 Page - ATMEL Corporation |
|
AT24C08N-10SA-5.0C Datasheet(HTML) 5 Page - ATMEL Corporation |
5 / 19 page 5 AT24C01A/02/04/08/16 3256F–SEEPR–10/04 Notes: 1. The AT24C01A/02/04/08 bearing the process letter “D” on the package (the mark is located in the lower right corner on the topside of the package), guarantees 400 kHz (2.5V, 2.7V). 2. This parameter is characterized and is not 100% tested (TA = 25°C). 3. This parameter is characterized and is not 100% tested. Device Operation CLOCK and DATA TRANSITIONS: The SDA pin is normally pulled high with an exter- nal device. Data on the SDA pin may change only during SCL low time periods (see Figure 4 on page 7). Data changes during SCL high periods will indicate a start or stop condition as defined below. START CONDITION: A high-to-low transition of SDA with SCL high is a start condition which must precede any other command (see Figure 5 on page 7). STOP CONDITION: A low-to-high transition of SDA with SCL high is a stop condition. After a read sequence, the stop command will place the EEPROM in a standby power mode (see Figure 5 on page 7). ACKNOWLEDGE: All addresses and data words are serially transmitted to and from the EEPROM in 8-bit words. The EEPROM sends a zero to acknowledge that it has received each word. This happens during the ninth clock cycle. Table 5. AC Characteristics Applicable over recommended operating range from T A = −40°C to +125°C, VCC = +2.7V to +5.5V, CL = 1 TTL Gate and 100 pF (unless otherwise noted). Symbol Parameter AT24C01A/02/04/08, 2.7V AT24C16, 2.7V AT24C01A/02/04/08/16, 5.0V Units Min Max Min Max Min Max f SCL Clock Frequency, SCL 400 (1) 400 400 kHz t LOW Clock Pulse Width Low 1.2 1.2 1.2 µs t HIGH Clock Pulse Width High 0.6 0.6 0.6 µs t I Noise Suppression Time (2) 50 50 50 ns t AA Clock Low to Data Out Valid 0.1 0.9 0.1 0.9 0.1 0.9 µs t BUF Time the bus must be free before a new transmission can start (3) 1.2 1.2 1.2 µs t HD.STA Start Hold Time 0.6 0.6 0.6 µs t SU.STA Start Set-up Time 0.6 0.6 0.6 µs t HD.DAT Data In Hold Time 0 0 0 µs t SU.DAT Data In Set-up Time 100 100 100 ns t R Inputs Rise Time (3) 300 300 300 ns t F Inputs Fall Time (3) 300 300 300 ns t SU.STO Stop Set-up Time 0.6 0.6 0.6 µs t DH Data Out Hold Time 50 50 50 ns t WR Write Cycle Time 5 5 5 ms Endurance 5.0V, 25 °C1M 1M 1M Write Cycles |
Similar Part No. - AT24C08N-10SA-5.0C |
|
Similar Description - AT24C08N-10SA-5.0C |
|
|
Link URL |
Privacy Policy |
ALLDATASHEET.COM |
Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Datasheet Upload | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |