 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
AT45DB321C-CC Datasheet(PDF) 11 Page - ATMEL Corporation |
|
||||||||||||||||||||||||||||||
AT45DB321C-CC Datasheet(HTML) 11 Page - ATMEL Corporation |
|
|
11 / 40 page  11 3387L–DFLASH–6/06 AT45DB321C 6.3.1 Erasing the Sector Protection Register To erase the Sector Protection Register, the CS pin must first be asserted. Once the CS pin has been asserted, the 4-byte erase command sequence must be clocked in via the SI (serial input) pin. After the last bit of the command sequence has been clocked in, the CS pin must be deas- serted to initiate the internally self-timed erase cycle (t PE). The Ready/Busy status will indicate that the device is busy during the erase cycle. The erased state of each bit (of a byte) in the Sec- tor Protection Register indicates that the corresponding sector is flagged for protection. The RESET pin is disabled during this erase cycle to prevent incomplete erasure of the Sector Pro- tection Register. 6.3.2 Programming the Sector Protection Register To program the Sector Protection Register, the CS pin must first be asserted. Once the CS pin has been asserted, the 4-byte command sequence must be clocked in via the SI (serial input) pin. After the last bit of the command sequence has been clocked in, the data for the contents of the Sector Protection Register must be clocked in. The first byte corresponds to sector 0 (0a, 0b), the second byte corresponds to Sector 1 and the last byte (byte 16) corresponds to Sector 15. After the last bit of data has been clocked in, the CS pin must be deasserted to initiate the internally self-timed program cycle (t P). The Ready/Busy status will indicate that the device is busy during the program cycle. The RESET pin is disabled during this program cycle to prevent incomplete programming of the sector protection register. 6.3.3 Reading the Sector Protection Register To read the Sector Protection Register, the CS pin must first be asserted. Once the CS pin has been asserted, a 4-byte command sequence 32H, 00H, 00H, 00H and 32 don’t care clock cycles must be clocked in via the SI (serial input) pin. The 32 don’t care clock cycles are required to ini- tialize the read operation. After the 32 don’t care clock cycles, any additional clock pulses on the SCK pin will result in data being output on the SO (serial output) pin. The read will begin with Byte_1 of the Sector Protection Register for Sector_0, followed with Byte_2 for Sector_1. The read operation will continue until Byte_16 for Sector_15 is read. Once the last byte is read a low- to-high transition on the CS pin is required to terminate the read operation. Note: Next generation devices of the “D” family will not require the 32 don’t care clock cycles. Command Byte 1 Byte 2 Byte 3 Byte 4 Erase Sector Protection Register 3DH 2AH 7FH CFH Command Byte 1 Byte 2 Byte 3 Byte 4 Program Sector Protection Register 3DH 2AH 7FH FCH Command Byte 1 Byte 2 Byte 3 Byte 4 Read Sector Protection Register 32H 00H 00H 00H |
Similar Part No. - AT45DB321C-CC |
|
Similar Description - AT45DB321C-CC |
|
|
Link URL |
| Privacy Policy |
| ALLDATASHEET.COM |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Datasheet Upload | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
