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AT43USB355 Datasheet(PDF) 11 Page - ATMEL Corporation |
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AT43USB355 Datasheet(HTML) 11 Page - ATMEL Corporation |
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11 / 115 page  11 AT43USB355 2603G–USB–04/06 Figure 5. READ Timing SRAM Data Memory Table 3 summarizes how the AT43USB355 SRAM Memory is organized. The lower 1120 Data Memory locations address the Register file, the I/O Memory and the internal data SRAM. The first 96 locations address the Register File + I/O Memory, and the next 1024 locations address the internal data SRAM. The five different addressing modes for the data memory cover: Direct, Indirect with Displacement, Indirect, Indirect with Pre-decrement and Indirect with Post- increment. In the register file, registers R26 to R31 feature the indirect addressing pointer reg- isters. Direct addressing reaches the entire data space. The Indirect with Displacement mode features 63 address locations that reach from the base address given by the Y- or Z-register. When using register indirect addressing modes with automatic pre-decrement and post-incre- ment, the address registers X, Y, and Z are decremented and incremented. The 32 general-purpose working registers, 64 I/O registers and the 1024 bytes of internal data SRAM in the AT43USB355 are all accessible through these addressing modes. To manage the USB hardware, a special set of registers is assigned. These registers are mapped to SRAM space between addresses $1F00 and 1FFF. Table 3 and Table 4 give an overview of these registers. 1 2 3 4 5 6 7 8 9 10112021222324252627282930 0 2 0 1 3 4 5 6 7 0 1 2 3 13 14 15 ... DATA OUT MSB HIGH IMPEDANCE INSTRUCTION BYTE ADDRESS SCK MOSI MISO SSN |
Similar Part No. - AT43USB355_06 |
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Similar Description - AT43USB355_06 |
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