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AT25F4096Y4-10YH-2.7 Datasheet(PDF) 7 Page - ATMEL Corporation |
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AT25F4096Y4-10YH-2.7 Datasheet(HTML) 7 Page - ATMEL Corporation |
7 / 19 page 7 AT25F4096 2454G–SFLSH–5/06 Functional Description The AT25F4096 is designed to interface directly with the synchronous serial peripheral interface (SPI) of the 6800 type series of microcontrollers. The AT25F4096 utilizes an 8-bit instruction register. The list of instructions and their operation codes are contained in Table 5. All instructions, addresses, and data are transferred with the MSB first and start with a high-to-low transition. Write is defined as program and/or erase in this specification. The following commands, Program, Sector Erase, Chip Erase, and WRSR are write instructions for AT25F4096. WRITE ENABLE (WREN): The device will power up in the write disable state when V CC is applied. All write instructions must therefore be preceded by the WREN instruction. WRITE DISABLE (WRDI): To protect the device against inadvertent writes, the WRDI instruction disables all write commands. The WRDI instruction is independent of the sta- tus of the WP pin. READ STATUS REGISTER (RDSR): The RDSR instruction provides access to the sta- tus register. The Ready/Busy and Write Enable status of the device can be determined by the RDSR instruction. Similarly, the block write protection bits indicate the extent of protection employed. These bits are set by using the WRSR instruction. During internal write cycles, all other commands will be ignored except the RDSR instruction. Table 5. Instruction Set for the AT25F4096 Instruction Name Instruction Format Operation WREN 0000 X110 Set Write Enable Latch WRDI 0000 X100 Reset Write Enable Latch RDSR 0000 X101 Read Status Register WRSR 0000 X001 Write Status Register READ 0000 X011 Read Data from Memory Array PROGRAM 0000 X010 Program Data Into Memory Array SECTOR ERASE 0101 X010 Erase One Sector in Memory Array CHIP ERASE 0110 X010 Erase All Sectors in Memory Array RDID 0001 X101 Read Manufacturer and Product ID Table 6. Status Register Format Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 WPEN X X BP2 BP1 BP0 WEN RDY |
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