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NCP5425 Datasheet(PDF) 10 Page - ON Semiconductor

Part # NCP5425
Description  Dual Synchronous Buck Controller
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Manufacturer  ONSEMI [ON Semiconductor]
Direct Link  http://www.onsemi.com
Logo ONSEMI - ON Semiconductor

NCP5425 Datasheet(HTML) 10 Page - ON Semiconductor

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NCP5425
http://onsemi.com
10
Current Sharing
When used in a two separate input to a single output mode,
the NCP5425 dual controller can provide input power
sharing in either of two ways:
A preset ratio. For example, Channel 1 could provide
70% of the load current, and Channel 2, the remaining
30%. Practical ratios for Channel 1/Channel 2
contribution to total load current range from 50%−50%
to 80%−20%.
A preset ratio up to a specific current contribution from
Channel 2. In excess of that limit, all of the additional
load current would be supplied by Channel 1. Figure 7
depicts the actual performance of a NCP5425
configured in a 70%−30% share ratio, with Channel 2
output current limited to 5.0 Amps.
The availability both Channel 2 error amplifier inputs
(signal and reference) at device pins is key to programmable
current ratio sharing. Current sense information from
Channel 1 is connected to the reference input of the Channel
2 error amplifier. Current information from Channel 2 is fed
back to the error amplifier’s inverting input. Channel 2 will
therefore act to adjust its current to match the current
information fed to its reference input from Channel 1. If this
information is one−half the voltage developed across the
Channel 1 output inductor, Channel 2 will run at half the
current and supply a approximately 33% of the total load
current. This application is illustrated in Figure 7.
In some applications the power supply designer may not
only wish to draw a known percentage of power from one
source, but also limit the power drawn from that source. The
current limit amplifier on Channel 2 can be programmed to
budget the maximum input power into Channel 2 and all
power in excess of that limit will be supplied solely by
Channel 1. This is accomplished by setting the Channel 2
cycle−by−cycle
current
limit
in
conjunction
with
programming the current ratio as described above.
Figure 6. Two Phase Current Sharing Circuit
Vin
+
Master
Error Amp
U2
0.8 V
Internal
Reference
VFB1
Q3
L1
R1
R
C3
C
R3
Vout
R
R4
R
C1
C
R1
R
C3
C
L2
C2
C
R2
R
R
+
VFB2
VREF2
U2
Slave
Error Amp
Vin
Q1
Q4
Q2
0.00
2.00
4.00
6.00
8.00
10.00
12.00
14.00
0
5
10
15
20
TOTAL OUTPUT CURRENT, AMPS
Iin(1)
Iin(2)
Iout(1)
Iout(2)
Channel 2 output current
begins to level off at 5
Amps
Channel 1 output current
share begins to increase
Figure 7. 70%/30% Current Sharing with Channel 2 Current Limiting
NOTE: Channel 1 input voltage = Channel 2 input voltage = 5.0 V
Output voltage = 1.5 V


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