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AT25P1024C1-10CI-2.7 Datasheet(PDF) 1 Page - ATMEL Corporation |
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AT25P1024C1-10CI-2.7 Datasheet(HTML) 1 Page - ATMEL Corporation |
1 / 17 page 1 Features • Serial Peripheral Interface (SPI) Compatible • Supports SPI Modes 0 (0,0) and 3 (1,1) • 2.1 MHz Clock Rate • 128-byte Page Mode Only for Write Operations • Low-voltage and Standard-voltage Operation – 2.7 (VCC = 2.7V to 5.5V) • Block Write Protection – Protect 1/4, 1/2, or Entire Array • Write Protect (WP) Pin and Write Disable Instructions for Both Hardware and Software Data Protection • Self-Timed Write Cycle (5 ms Typical) • High Reliability – Endurance: 100,000 Write Cycles – Data Retention: >40 Years • 20-lead JEDEC SOIC and 8-lead Leadless Array Package Description The AT25P1024 provides 1,048,576 bits of serial electrically erasable programmable read only memory (EEPROM) organized as 131,072 words of 8 bits each. The device is optimized for use in many industrial and commercial applications where low power and low voltage operation are essential. The AT25P1024 is available in space saving 20-lead JEDEC SOIC and 8-lead LAP packages. The AT25P1024 is enabled through the Chip Select pin (CS) and accessed via a 3- wire interface consisting of Serial Data Input (SI), Serial Data Output (SO), and Serial Clock (SCK). All programming cycles are completely self-timed, and no separate erase cycle is required before write. Table 1. Pin Configurations Pin Name Function CS Chip Select SCK Serial Data Clock SI Serial Data Input SO Serial Data Output GND Ground VCC Power Supply WP Write Protect HOLD Suspends Serial Input NC No Connect 1082I–SEEPR–7/06 SPI Serial EEPROMs 1M (131,072 x 8) AT25P1024 Note: Not Recommended for new design; Please refer to AT25FS010 datasheet. 20-lead SOIC 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 CS SO NC NC NC NC NC NC WP GND VCC HOLD NC NC NC NC NC NC SCK SI 8-lead Leadless Array Bottom View 1 2 3 4 8 7 6 5 VCC HOLD SCK SI CS SO WP GND |
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