NCP3163, NCV3163

http://onsemi.com

2

16

9

10

11

12

13

14

15

8

7

6

5

4

3

2

LVI

Oscillator

+

+

−

Current

Limit

Figure 2. Representative Block Diagram

(Bottom View)

−

+

+

+

−

1

Thermal

R

S

Q

Driver Collector

Switch Collector

0.25 V

Switch Emitter

Bootstrap Input

Voltage Feedback 1

Voltage Feedback 2

LVI Output

Gnd

Timing Capacitor

2.0 mA

7.0 V

60

Q1

Q2

1.125 V

15 k

1.25 V

Feedback

Comparator

Shutdown

45 k

Latch

+

−

= Sink Only

Positive True Logic

PIN FUNCTION DESCRIPTION

SOIC16

DFN18

PIN NAME

DESCRIPTION

1

15

LVI Output

2

16

Voltage Feedback 2

Connecting this pin to a resistor divider off of the output will regulate the application

3

17

Voltage Feedback 1

Connecting this pin directly to the output will regulate the device to 5.05 V.

4

18

GND

Ground pin for all internal circuits and power switch.

6

1

Timing Capacitor

Connect a capacitor to this pin to set the frequency. The addition of a parallel resis-

tor will decrease the maximum duty cycle and increase the frequency.

7

3

Power pin for the IC.

8

4

pulse basis.

9

5

Drive Collector

Voltage driver collector

10,11

6,7,8,9

Switch Collector

Internal switch transistor collector

14,15

10,11,12,13

Switch Emitter

Internal switch transistor emitter

16

14

Bootstrap Input

series resistor and capacitor can be utilized to improve the converter efficiency.

5,12,13

2

No Connect

These pins have no connection.

Exposed

Pad

Exposed

Pad

Exposed Pad

The exposed pad beneath the package must be connected to GND (pin 4). Addi-

tionally, using proper layout techniques, the exposed pad can greatly enhance the

power dissipation capabilities of the NCP3163.