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NCP1653PG Datasheet(PDF) 10 Page - ON Semiconductor |
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NCP1653PG Datasheet(HTML) 10 Page - ON Semiconductor |
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10 / 19 page  NCP1653, NCP1653A http://onsemi.com 10 The input filter capacitor Cfilter and the front−ended EMI filter absorbs the high−frequency component of inductor current IL. It makes the input current Iin a low−frequency signal only of the inductor current. Iin + IL−50 (eq.2) The suffix 50 means it is with a 50 or 60 Hz bandwidth of the original IL. From (eq.1) and (eq.2), the input impedance Zin is formulated. Zin + Vin Iin + T * t1 T Vout IL−50 (eq.3) Power factor is corrected when the input impedance Zin in (eq.3) is constant or slowly varying in the 50 or 60 Hz bandwidth. Figure 27. PFC Duty Modulation and Timing Diagram R S Q 0 1 clock PFC Modulation Output Clock Latch Set Latch Reset Inductor Current without filtering − + + Vref Vref Vramp Vramp VM VM VM Ich Cramp The PFC duty modulation and timing diagram is shown in Figure 27. The MOSFET on time t1 is generated by the intersection of reference voltage Vref and ramp voltage Vramp. A relationship in (eq.4) is obtained. Vramp + VM ) Icht1 Cramp + Vref (eq.4) The charging current Ich is specially designed as in (eq.5). The multiplier voltage VM is therefore expressed in terms of t1 in (eq.6). Ich + Cramp Vref T (eq.5) (eq.6) VM + Vref * t1 Cramp CrampVref T + Vref T * t1 T From (eq.3) and (eq.6), the input impedance Zin is re−formulated in (eq.7). (eq.7) Zin + VM Vref Vout IL−50 Because Vref and Vout are roughly constant versus time, the multiplier voltage VM is designed to be proportional to the IL−50 in order to have a constant Zin for PFC purpose. It is illustrated in Figure 28. Figure 28. Multiplier Voltage Timing Diagram V in time time V M time I in I L It can be seen in the timing diagram in Figure 27 that VM originally consists of a switching frequency ripple coming from the inductor current IL. The duty ratio can be inaccurately generated due to this ripple. This modulation is the so−called “peak current−mode”. Hence, an external capacitor CM connected to the multiplier voltage VM pin (Pin 5) is essential to bypass the high−frequency component of VM. The modulation becomes the so−called “average current−mode” with a better accuracy for PFC. Figure 29. External Connection on the Multiplier Voltage Pin 5 RM Ivac IS 2Icontrol VM = PFC Duty Modulation IM VM RM CM The multiplier voltage VM is generated according to (eq.8). VM + RM Ivac IS 2Icontrol (eq.8) Input−voltage current Ivac is proportional to the RMS input voltage Vac as described in (eq.9). The suffix ac |
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