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NCP1203D100R2G Datasheet(PDF) 3 Page - ON Semiconductor |
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NCP1203D100R2G Datasheet(HTML) 3 Page - ON Semiconductor |
3 / 15 page NCP1203 http://onsemi.com 3 Figure 2. Internal Circuit Architecture OVERLOAD MANAGEMENT UVLO HIGH AND LOW INTERNAL REGULATOR ±250 mA HV CURRENT SOURCE INTERNAL VCC 8 7 6 5 HV NC VCC Drv 1 2 3 4 Q FLIP−FLOP DCmax = 80% Q 250 ns L.E.B. 40−60−100 kHz CLOCK − + − + 80 k 20 k 57 k 1 V CURRENT SENSE GROUND FB Adj 24 k 25 k + − VREF RESET 1.2 V SKIP CYCLE COMPARATOR SET MAXIMUM RATINGS Rating Symbol Value Unit Power Supply Voltage VCC, Drv 16 V Power Supply Voltage on all other pins except Pin 5 (Drv), Pin 6 (VCC) and Pin 8 (HV) − −0.3 to 10 V Maximum Current into all pins except Pin 6 (VCC) and Pin 8 (HV) when 10 V ESD diodes are activated − 5.0 mA Thermal Resistance, Junction−to−Air, PDIP−8 Version Thermal Resistance, Junction−to−Air, SOIC Version RqJA RqJA 100 178 °C/W °C/W Maximum Junction Temperature TJMAX 150 °C Temperature Shutdown − 170 °C Hysteresis in Shutdown − 30 °C Operating Temperature Range TJ −40 to +125 °C Storage Temperature Range Tstg −60 to +150 °C ESD Capability, HBM Model, All pins except Pin 6 (VCC) and Pin 8 (HV) − 2.0 kV ESD Capability, Machine Model − 200 V Maximum Voltage on Pin 6 (VCC) and Pin 8 (HV) Decoupled to Ground with 10 mF − 450 V Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected. |
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