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NCP1010AP100G Datasheet(PDF) 10 Page - ON Semiconductor |
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NCP1010AP100G Datasheet(HTML) 10 Page - ON Semiconductor |
10 / 24 page NCP1010, NCP1011, NCP1012, NCP1013, NCP1014 http://onsemi.com 10 Figure 16. NCP101X Facing a Fault Condition (Vin = 150 Vdc) Tstart Tsw TLatch 1 V Ripple Latch--off Level The rising slope from the latch--off level up to 8.5 V is expressed by: Tstart = ΔV1 · C IC1 . The time during which the IC actually pulses is given by tsw = ΔV2 · C ICC1 . Finally, the latch--off time can be derived using the same formula topology: TLatch = ΔV3 · C ICC2 . From these three definitions, the burst duty--cycle can be computed: dc = Tsw Tstart + Tsw + TLatch (eq. 2) . dc = ΔV2 ICC1 · ΔV2 ICC1 + ΔV1 IC1 + ΔV3 ICC2 (eq. 3) . Feeding the equation with values extracted from the parameter section gives a typical duty--cycle of 13%, precluding any lethal thermal runaway while in a fault condition. DSS Internal Dissipation The Dynamic Self--Supplied pulls energy out from the drain pin. In Flyback--based converters, this drain level can easily go above 600 V peak and thus increase the stress on the DSS startup source. However, the drain voltage evolves with time and its period is small compared to that of the DSS. As a result, the averaged dissipation, excluding capacitive losses, can be derived by: PDSS = ICC1 · < Vds(t) > . (eq. 4) . Figure 17 portrays a typical drain--ground waveshape where leakage effects have been removed. Figure 17. A typical drain--ground waveshape where leakage effects are not accounted for. Vds(t) Vin Vr toff dt ton t Tsw By looking at Figure 17, the average result can easily be derived by additive square area calculation: < Vds(t) >= Vin · (1 − d) + Vr · toff Tsw (eq. 5) By developing Equation 5, we obtain: < Vds(t) >= Vin − Vin · ton Tsw + Vr · toff Tsw (eq. 6) toff can be expressed by: toff = Ip · Lp Vr (eq. 7) where ton can be evaluated by: ton = Ip · Lp Vin (eq. 8) . |
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