6

ATmega325/3250/645/6450

2570JS–AVR–11/06

Comparison between

ATmega325,

ATmega3250,

ATmega645 and

ATmega6450

The ATmega325, ATmega3250, ATmega645, and ATmega6450 differs only in memory

sizes, pin count and pinout. Table 1 on page 6 summarizes the different configurations

for the four devices.

Pin Descriptions

The following section describes the I/O-pin special functions.

V

CC

Digital supply voltage.

GND

Ground.

Port A (PA7..PA0)

Port A is an 8-bit bi-directional I/O port with internal pull-up resistors (selected for each

bit). The Port A output buffers have symmetrical drive characteristics with both high sink

and source capability. As inputs, Port A pins that are externally pulled low will source

current if the pull-up resistors are activated. The Port A pins are tri-stated when a reset

condition becomes active, even if the clock is not running.

Port B (PB7..PB0)

Port B is an 8-bit bi-directional I/O port with internal pull-up resistors (selected for each

bit). The Port B output buffers have symmetrical drive characteristics with both high sink

and source capability. As inputs, Port B pins that are externally pulled low will source

current if the pull-up resistors are activated. The Port B pins are tri-stated when a reset

condition becomes active, even if the clock is not running.

Port B has better driving capabilities than the other ports.

Por t B also ser v es the fu nctio n s of va r i ou s sp ecia l f e a t ur es of t h e

ATmega325/3250/645/6450 as listed on page 66.

Port C (PC7..PC0)

Port C is an 8-bit bi-directional I/O port with internal pull-up resistors (selected for each

bit). The Port C output buffers have symmetrical drive characteristics with both high sink

and source capability. As inputs, Port C pins that are externally pulled low will source

current if the pull-up resistors are activated. The Port C pins are tri-stated when a reset

condition becomes active, even if the clock is not running.

Port D (PD7..PD0)

Port D is an 8-bit bi-directional I/O port with internal pull-up resistors (selected for each

bit). The Port D output buffers have symmetrical drive characteristics with both high sink

and source capability. As inputs, Port D pins that are externally pulled low will source

current if the pull-up resistors are activated. The Port D pins are tri-stated when a reset

condition becomes active, even if the clock is not running.

Por t D also se rve s t h e fu nctio n s of var i ous sp ecia l fea t u r es of th e

ATmega325/3250/645/6450 as listed on page 69.

Port E (PE7..PE0)

Port E is an 8-bit bi-directional I/O port with internal pull-up resistors (selected for each

bit). The Port E output buffers have symmetrical drive characteristics with both high sink

and source capability. As inputs, Port E pins that are externally pulled low will source

Table 1. Configuration Summary

Device

Flash

EEPROM

RAM

General Purpose

I/O Pins

ATmega325

32K bytes

1K bytes

2K bytes

54

ATmega3250

32K bytes

1K bytes

2K bytes

69

ATmega645

64K bytes

2K bytes

4K bytes

54

ATmega6450

64K bytes

2K bytes

4K bytes

69