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ATTINY12L Datasheet(PDF) 4 Page - ATMEL Corporation |
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ATTINY12L Datasheet(HTML) 4 Page - ATMEL Corporation |
4 / 13 page 4 ATtiny28L/V 1062FS–AVR–07/06 Notes: 1. For compatibility with future devices, reserved bits should be written to zero if accessed. Reserved I/O memory addresses should never be written. 2. Some of the status flags are cleared by writing a logical “1” to them. Note that the CBI and SBI instructions will operate on all bits in the I/O register, writing a one back into any flag read as set, thus clearing the flag. The CBI and SBI instructions work with registers $00 to $1F only. Register Summary Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Page $3F SREG I T H S V N Z C page 6 $3E Reserved ... Reserved $20 Reserved $1F Reserved $1E Reserved $1D Reserved $1C Reserved $1B PORTA - - - - PORTA3 PORTA2 PORTA1 PORTA0 page 32 $1A PACR - - - - DDA3 PA2HC DDA1 DDA0 page 32 $19 PINA - - - -PINA3 - PINA1 PINA0 page 32 $18 Reserved $17 Reserved $16 PINB PINB7 PINB6 PINB5 PINB4 PINB3 PINB2 PINB1 PINB0 page 32 $15 Reserved $14 Reserved $13 Reserved $12 PORTD PORTD7 PORTD6 PORTD5 PORTD4 PORTD3 PORTD2 PORTD1 PORTD0 page 33 $11 DDRD DDD7 DDD6 DDD5 DDD4 DDD3 DDD2 DDD1 DDD0 page 33 $10 PIND PIND7 PIND6 PIND5 PIND4 PIND3 PIND2 PIND1 PIND0 page 33 $0F Reserved $0E Reserved $0D Reserved $0C Reserved $0B Reserved $0A Reserved $09 Reserved $08 ACSR ACD -ACO ACI ACIE - ACIS1 ACIS0 page 44 $07 MCUCS PLUPB - SE SM WDRF - EXTRF PORF page 19 $06 ICR INT1 INT0 LLIE TOIE0 ISC11 ISC10 ISC01 ISC00 page 22 $05 IFR INTF1 INTF0 -TOV0 - - - - page 23 $04 TCCR0 FOV0 - - OOM01 OOM00 CS02 CS01 CS00 page 35 $03 TCNT0 Timer/Counter0 (8-bit) page 36 $02 MODCR ONTIM4 ONTIM3 ONTIM2 ONTIM1 ONTIM0 MCONF2 MCONF1 MCONF0 page 43 $01 WDTCR - - - WDTOE WDE WDP2 WDP1 WDP0 page 37 $00 OSCCAL Oscillator Calibration Register page 9 |
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