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NB100LVEP56_06 Datasheet(PDF) 6 Page - ON Semiconductor

Part No. NB100LVEP56_06
Description  2.5V / 3.3V ECL DUAL Differential 2:1 Multiplexer
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Maker  ONSEMI [ON Semiconductor]
Homepage  http://www.onsemi.com
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NB100LVEP56
http://onsemi.com
6
Table 8. AC CHARACTERISTICS VCC = 0 V; VEE = −2.375 V to −3.8 V or VCC = 2.375 V to 3.8 V; VEE = 0 V (Note 14)
Symbol
Characteristic
−40°C
25°C
85°C
Unit
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
VOUTPP Output Voltage Amplitude
fin v 1 GHz
(See Figure 4)
fin = 2 GHz
fin = 2.5 GHz
525
500
400
700
600
500
550
500
350
700
600
450
500
400
200
700
500
300
mV
tPLH,
tPHL
Propagation Delay to Output Differential
D to Q, Q
SEL to Q, Q
COM_SEL to Q, Q
375
575
550
500
775
750
625
975
950
400
625
600
525
825
800
650
1025
1000
450
700
700
575
900
900
700
1100
1100
ps
tSkew
Pulse Skew (Note 15)
Within Device Input Skew (Note 16)
Within Device Output Skew (Note 17)
Device−to−Device Skew (Note 18)
10
5
15
50
50
30
50
200
10
5
15
50
10
5
15
50
50
30
50
200
ps
tJITTER
RMS Random Clock Jitter (Note 19)
@ v1.0 GHz
@ v1.5 GHz
@ v2.0 GHz
@ v2.5 GHz
Peak−to−Peak Data Dependent Jitter (Note 20)
@ 0.5 GHz
@ 1.25 GHz
@ 2.488 GHz
0.269
0.306
0.250
0.339
4.1
32.2
30.8
0.4
0.4
0.4
0.8
16
80
66
0.307
0.303
0.305
0.895
4.6
22.6
27.2
0.4
0.4
0.5
2.0
15
63
56
0.371
0.391
0.722
2.443
4.4
22
24.4
0.5
0.6
1.2
7.7
16
53
54
ps
VINPP
Input Voltage Swing (Differential Configuration)
(Note 21)
150
800
1200
150
800
1200
150
800
1200
mV
tr
tf
Output Rise/Fall Times @ 50 MHz
Q, Q
(20% − 80%)
60
110
150
60
120
170
90
140
230
ps
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
14.Measured using a 750 mV source, 50% duty cycle clock source. All loading with 50 W to VCC − 2.0 V. Input edge rates 150 ps (20% − 80%).
15.Pulse Skew |tPLH − tPHL|
16.Worst case difference between D0a and D0b (or between D1a or D1b), when both output come from same input.
17.Worst case difference between Q0 and Q1 outputs.
18.Skew is measured between outputs under identical transitions.
19.Additive RMS jitter with 50% Duty Cycle Clock Signal.
20.Additive Peak−to−Peak jitter with input NRZ data at PRBS 231−1.
21.Input voltage swing is a single−ended measurement operating in differential mode.
Figure 4. Output Voltage Amplitude (VOUTPP) vs.
Input Frequency (fin) at VCC = 2.5 V, 255C
INPUT FREQUENCY (GHz)
250
350
450
550
650
750
850
0.5
1.0
1.5
2.0
2.5
Q AMP (mV)




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