© Semiconductor Components Industries, LLC, 2006

January, 2006 − Rev. 1

1

Publication Order Number:

NB7L14M/D

NB7L14M

2.5V/3.3VDifferential 1:4

Clock/Data Fanout Buffer/

Translator with CML

Outputs and Internal

Termination

Description

The NB7L14M is a differential 1−to−4 clock/data distribution chip

with internal source terminated CML output structures, optimized for

minimal skew and jitter. Device produces four identical output copies

of clock or data operating up to 8 GHz or 12 Gb/s, respectively. As

such, NB7L14M is ideal for SONET, GigE, Fiber Channel, Backplane

and other clock/data distribution applications.

Inputs incorporate internal 50

W termination resistors and accept

LVPECL, CML, LVCMOS, LVTTL, or LVDS (See Table 6).

Differential 16 mA CML outputs provide matching internal 50

W

terminations, and 400 mV output swings when externally terminated

with 50

The device is offered in a low profile 3x3 mm 16−pin QFN package.

Application notes, models, and support documentation are available at

www.onsemi.com.

Features

Output Only

and SG Devices

Figure 1. Logic Diagram

50 W

50 W

CLK

CLK

Q3

Q3

Q2

Q2

Q1

Q1

Q0

Q0

http://onsemi.com

*For additional marking information, refer to

Application Note AND8002/D.

MARKING

DIAGRAM*

A

= Assembly Location

L

= Wafer Lot

Y

= Year

W

= Work Week

G

= Pb−Free Package

QFN−16

MN SUFFIX

CASE 485G

16

NB7L

14M

ALYWG

G

1

See detailed ordering and shipping information in the package

dimensions section on page 10 of this data sheet.

ORDERING INFORMATION

(Note: Microdot may be in either location)