© Semiconductor Components Industries, LLC, 2006

February, 2006 − Rev. 2

1

Publication Order Number:

NTMD3P03R2/D

NTMD3P03R2

Power MOSFET

−3.05 Amps, −30 Volts

Dual P−Channel SOIC−8

Features

Applications

Computers, Printers, PCMCIA Cards, Cellular & Cordless Telephones

Rating

Symbol

Value

Unit

Drain−to−Source Voltage

−30

V

Gate−to−Source Voltage − Continuous

±20

V

Thermal Resistance −

Junction−to−Ambient (Note 1)

Continuous Drain Current @ 25°C

Continuous Drain Current @ 70°C

Pulsed Drain Current (Note 4)

171

0.73

−2.34

−1.87

−8.0

°C/W

W

A

A

A

Thermal Resistance −

Junction−to−Ambient (Note 2)

Continuous Drain Current @ 25°C

Continuous Drain Current @ 70°C

Pulsed Drain Current (Note 4)

100

1.25

−3.05

−2.44

−12

°C/W

W

A

A

A

Thermal Resistance −

Junction−to−Ambient (Note 3)

Continuous Drain Current @ 25°C

Continuous Drain Current @ 70°C

Pulsed Drain Current (Note 4)

62.5

2.0

−3.86

−3.1

−15

°C/W

W

A

A

A

Operating and Storage

Temperature Range

−55 to

+150

°C

Single Pulse Drain−to−Source Avalanche

140

mJ

Maximum Lead Temperature for Soldering

Purposes, 1/8″ from case for 10 seconds

260

°C

Maximum ratings are those values beyond which device damage can occur.

Maximum ratings applied to the device are individual stress limit values (not

normal operating conditions) and are not valid simultaneously. If these limits are

exceeded, device functional operation is not implied, damage may occur and

reliability may be affected.

1. Minimum FR−4 or G−10 PCB, t = Steady State.

2. Mounted onto a 2″ square FR−4 Board (1 in sq, 2 oz Cu 0.06″ thick

single sided), t = steady state.

3. Mounted onto a 2″ square FR−4 Board (1 in sq, 2 oz Cu 0.06″ thick

single sided), t ≤ 10 seconds.

4. Pulse Test: Pulse Width = 300 ms, Duty Cycle = 2%.

P−Channel

D

S

G

http://onsemi.com

−30 V

85 mW @ −10 V

−3.05 A

SOIC−8

SUFFIX NB

CASE 751

STYLE 11

MARKING DIAGRAM*

AND PIN ASSIGNMENT

ED3P03= Specific Device Code

A

= Assembly Location

Y

= Year

WW

= Work Week

G

= Pb−Free Package

ED3P03

AYWW G

G

1

8

1

8

S1 G1 S2 G2

D1 D1 D2 D2

*For additional marking information, refer to

Application Note AND8002/D.

(Note: Microdot may be in either location)

†For information on tape and reel specifications,

including part orientation and tape sizes, please

refer to our Tape and Reel Packaging Specifications

Brochure, BRD8011/D

Device

Package

ORDERING INFORMATION

NTMD3P03R2

SOIC−8

2500/Tape & Reel

NTMD3P03R2G

SOIC−8

(Pb−Free)

2500/Tape & Reel