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NB4N840M Datasheet(PDF) 5 Page - ON Semiconductor

Part # NB4N840M
Description  3.3V 3.2Gb/s Dual Differential Clock/Data 2 x 2 Crosspoint Switch with CML Output and Internal Termination
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Manufacturer  ONSEMI [ON Semiconductor]
Direct Link  http://www.onsemi.com
Logo ONSEMI - ON Semiconductor

NB4N840M Datasheet(HTML) 5 Page - ON Semiconductor

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NB4N840M
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5
Table 5. DC CHARACTERISTICS, CLOCK INPUTS, CML OUTPUTS VCC = 3.0 V to 3.6 V, TA = −40°C to +85°C
Symbol
Characteristic
Min
Typ
Max
Unit
ICC
Power Supply Current (All outputs enabled)
130
170
mA
Voutdiff
CML Differential Output Swing (Note 4, Figures 5 and 12)
640
800
1000
mV
VCMR
(Note 6)
CML Output Common Mode Voltage (Loaded 50
W to VCC)
VCC − 200
mV
CML Single−Ended Input Voltage Range
VCC − 0.8
VCC + 0.4
mV
VID
Differential Input Voltage (VIHD − VILD)
300
1600
mV
LVTTL CONTROL INPUT PINS
VIH
Input HIGH Voltage (LVTTL Inputs)
2000
mV
VIL
Input LOW Voltage (LVTTL Inputs)
800
mV
IIH
Input HIGH Current (LVTTL Inputs)
−10
10
mA
IIL
Input LOW Current (LVTTL Inputs)
−10
10
mA
RTIN
CML Single−Ended Input Resistance
42.5
50
57.5
W
RTOUT
Differential Output Resistance
85
100
115
W
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
4. CML outputs require 50
W receiver termination resistors to VCC for proper operation (Figure 10).
5. Input and output parameters vary 1:1 with VCC.
6. VCMR min varies 1:1 with VEE, VCMR max varies 1:1 with VCC.
Table 6. AC CHARACTERISTICS VCC = 3.0 V to 3.6 V, VEE = 0 V (Note 7, Figure 9)
Symbol
Characteristic
−40
°C
25
°C
85
°C
Unit
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
VOUTPP
Output Voltage Amplitude (@ VINPPmin)fin ≤ 2 GHz
(See Figure 3)
fin ≤ 3 GHz
fin ≤ 3.5 GHz
280
235
170
365
310
220
280
235
170
365
310
220
280
235
170
365
310
220
mV
fDATA
Maximum Operating Data Rate
3.2
3.2
3.2
Gb/s
tPLH,
tPHL
Propagation Delay to Output Differential
D/D to Q/Q
140
225
340
140
225
340
140
225
340
ps
tSKEW
Duty Cycle Skew (Note 8)
Within−Device Skew (Figure 4)
Device−to−Device Skew (Note 12)
5
5
20
25
25
85
5
5
20
25
25
85
5
5
20
25
25
85
ps
tJITTER
RMS Random Clock Jitter (Note 10) fin v 3.2 GHz
Peak−to−Peak Data Dependent Jitter fin = 2.5 Gb/s
(Note 11)
fin = 3.2 Gb/s
0.15
7
7
0.5
20
20
0.15
7
7
0.5
20
20
0.15
7
7
0.5
20
20
ps
Crosstalk−Induced RMS Jitter (Note 13)
0.5
0.5
0.5
ps
VINPP
Input Voltage Swing/Sensitivity
(Differential Configuration) (Note 9)
150
800
150
800
150
800
mV
tr
tf
Output Rise/Fall Times @ 0.5 GHz
Q, Q
(20% − 80%)
80
135
80
135
80
135
ps
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
7. Measured by forcing VINPP (MIN) from a 50% duty cycle clock source. All loading with an external RL = 50 W to VCC. Input edge rates 40 ps
(20% − 80%).
8. Duty cycle skew is measured between differential outputs using the deviations of the sum of Tpw− and Tpw+ @ 0.5 GHz.
9. VINPP (MAX) cannot exceed 800 mV. Input voltage swing is a single−ended measurement operating in differential mode.
10. Additive RMS jitter using 50% duty cycle clock input signal.
11. Additive peak−to−peak data dependent jitter using input data pattern with PRBS 223−1 and K28.5, VINPP = 400 mV.
12. Device to device skew is measured between outputs under identical transition @ 0.5 GHz.
13. Data taken on the same device under identical condition.


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