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CAT93C66VI-GT3 Datasheet(PDF) 7 Page - Catalyst Semiconductor

Part # CAT93C66VI-GT3
Description  4-Kb Microwire Serial CMOS EEPROM
Download  17 Pages
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Manufacturer  CATALYST [Catalyst Semiconductor]
Direct Link  http://www.catalyst-semiconductor.com
Logo CATALYST - Catalyst Semiconductor

CAT93C66VI-GT3 Datasheet(HTML) 7 Page - Catalyst Semiconductor

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CAT93C66
© 2007 Catalyst Semiconductor, Inc.
7
Doc. No. 1089 Rev. P
Characteristics subject to change without notice
Write
After receiving a WRITE command (Figure 4), address
and the data, the CS (Chip Select) pin must be
deselected for a minimum of tCSMIN. The falling edge of
CS will start the self clocking clear and data store cycle
of the memory location specified in the instruction. The
clocking of the SK pin is not necessary after the device
has entered the self clocking mode. The ready/busy
status of the CAT93C66 can be determined by
selecting the device and polling the DO pin. Since this
device features Auto-Clear before write, it is NOT
necessary to erase a memory location before it is
written into.
Erase
Upon receiving an ERASE command and address,
the CS (Chip Select) pin must be deasserted for a
minimum of tCSMIN (Figure 5). The falling edge of CS
will start the self clocking clear cycle of the selected
memory location. The clocking of the SK pin is not
necessary after the device has entered the self
clocking mode. The ready/ busy status of the
CAT93C66 can be determined by selecting the device
and polling the DO pin. Once cleared, the content of a
cleared location returns to a logical “1” state.
Figure 3. EWEN/EWDS Instruction Timing
Figure 4. Write Instruction Timing
Figure 5. Erase Instruction Timing
CS
DI
STANDBY
10
0
*
* ENABLE = 11
DISABLE = 00
SK
SK
CS
DI
DO
tCSMIN
STANDBY
HIGH-Z
HIGH-Z
10
1
AN AN-1
A0
DN
D0
BUSY
READY
STATUS
VERIFY
tSV
tHZ
tEW
SK
CS
DI
DO
STANDBY
HIGH-Z
HIGH-Z
1
AN
AN-1
BUSY
READY
STATUS VERIFY
tSV
tHZ
tEW
tCS
11
A0


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