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CAT24WC32GL-1.8TE13B Datasheet(PDF) 1 Page - Catalyst Semiconductor |
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CAT24WC32GL-1.8TE13B Datasheet(HTML) 1 Page - Catalyst Semiconductor |
1 / 12 page 1 © 2005 by Catalyst Semiconductor, Inc. Characteristics subject to change without notice Doc. No. 1039, Rev. G CAT24WC32/64 32K/64K-Bit I2C Serial CMOS EEPROM DOUT ACK SENSE AMPS SHIFT REGISTERS CONTROL LOGIC WORD ADDRESS BUFFERS START/STOP LOGIC STATE COUNTERS SLAVE ADDRESS COMPARATORS E2PROM 128/256 X 256 VCC EXTERNAL LOAD COLUMN DECODERS XDEC DATA IN STORAGE HIGH VOLTAGE/ TIMING CONTROL VSS WP SCL A0 A1 A2 SDA 128/256 256 VCC WP SCL SDA 1 2 3 4 8 7 6 5 A0 VCC WP SCL SDA 1 2 3 4 8 7 6 5 A1 A2 VSS A0 A1 A2 VSS DESCRIPTION The CAT24WC32/64 is a 32K/64K-bit Serial CMOS E2PROM internally organized as 4096/8192 words of 8 bits each. Catalyst’s advanced CMOS technology sub- stantially reduces device power requirements. The * Catalyst Semiconductor is licensed by Philips Corporation to carry the I2C Bus Protocol. I Commercial, industrial, automotive and extended automotive temperature ranges I Write protection – Entire array protected when WP at V IH I 1,000,000 Program/erase cycles I 100 year data retention CAT24WC32/64 features a 32-byte page write buffer. The device operates via the I2C bus serial interface and is available in 8-pin DIP or 8-pin SOIC packages. PIN CONFIGURATION BLOCK DIAGRAM PIN FUNCTIONS Pin Name Function A0, A1, A2 Device Address Inputs SDA Serial Data/Address SCL Serial Clock WP Write Protect VCC +1.8V to +5.5V Power Supply VSS Ground 24WC32/64 F02 I 400 KHz I2C bus compatible* I 1.8 to 5.5 volt read and write operation I Cascadable for up to eight devices I 32/64-Byte page write buffer I Self-timed write cycle with auto-clear I 8-pin DIP or 8-pin SOIC I Schmitt trigger inputs for noise protection FEATURES DIP Package (P, L, GL) SOIC Package (J, W, K, X, GW, GX) |
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