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MC74LCX16245 Datasheet(PDF) 1 Page - ON Semiconductor |
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MC74LCX16245 Datasheet(HTML) 1 Page - ON Semiconductor |
1 / 8 page © Semiconductor Components Industries, LLC, 2005 August, 2005 − Rev. 7 1 Publication Order Number: MC74LCX16245/D MC74LCX16245 Low−Voltage CMOS 16−Bit Transceiver With 5 V−Tolerant Inputs and Outputs (3−State, Non−Inverting) The MC74LCX16245 is a high performance, non−inverting 16−bit transceiver operating from a 2.3 to 3.6 V supply. The device is byte controlled. Each byte has separate Output Enable inputs which can be tied together for full 16−bit operation. High impedance TTL compatible inputs significantly reduce current loading to input drivers while TTL compatible outputs offer improved switching noise performance. A VI specification of 5.5 V allows MC74LCX16245 inputs to be safely driven from 5.0 V devices. The MC74LCX16245 is suitable for memory address driving and all TTL level bus oriented transceiver applications. The 4.5 ns maximum propagation delays support high performance applications. Current drive capability is 24 mA at both A and B ports. The Transmit/Receive (T/Rn) inputs determine the direction of data flow through the bidirectional transceiver. Transmit (active−HIGH) enables data from A ports to B ports; Receive (active−LOW) enables data from B to A ports. The Output Enable inputs (OEn), when HIGH, disable both A and B ports by placing them in a HIGH Z condition. Features • Designed for 2.3 to 3.6 V VCC Operation • 4.5 ns Maximum tpd • 5.0 V Tolerant − Interface Capability With 5.0 V TTL Logic • Supports Live Insertion and Withdrawal • IOFF Specification Guarantees High Impedance When VCC = 0 V • LVTTL Compatible • LVCMOS Compatible • 24 mA Balanced Output Sink and Source Capability • Near Zero Static Supply Current in All Three Logic States (20 mA) Substantially Reduces System Power Requirements • Latchup Performance Exceeds 500 mA • ESD Performance: Human Body Model >2000 V; Machine Model >200 V • These are Pb−Free Devices* *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. MARKING DIAGRAM TSSOP−48 DT SUFFIX CASE 1201 1 48 A = Assembly Location WL = Wafer Lot YY = Year WW = Work Week G = Pb−Free Package 1 48 LCX16245G AWLYYWW See detailed ordering and shipping information in the package dimensions section on page 3 of this data sheet. ORDERING INFORMATION http://onsemi.com |
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