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MT9196ASR Datasheet(PDF) 6 Page - Zarlink Semiconductor Inc

Part # MT9196ASR
Description  Integrated Digital Phone Circuit (IDPC)
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Manufacturer  ZARLINK [Zarlink Semiconductor Inc]
Direct Link  http://www.zarlink.com
Logo ZARLINK - Zarlink Semiconductor Inc

MT9196ASR Datasheet(HTML) 6 Page - Zarlink Semiconductor Inc

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MT9196
Data Sheet
6
Zarlink Semiconductor Inc.
section so that Rx gain adjustment will not affect side-tone levels. The side-tone path may be enabled/disabled with
the Voice sidetone bit located in the Receive Path Control Register (address 13h).
Transmit and receive filter gains are controlled by the TxFG0-TxFG2 and RxFG0-RxFG2 control bits, respectively.
These are located in the FCODEC Control Register 1 (address 0Ah). Transmit filter gain is adjustable from 0 dB to
+7 dB and receive filter gain from 0 dB to -7 dB, both in 1 dB increments.
Side-tone filter gain is controlled by the STG0-STG2 control bits located in the FCODEC Control Register 2
(address 0Bh). Side-tone gain is adjustable from
-9.96 dB to +9.96 dB in 3.32 dB increments.
Companding law selection for the Filter/CODEC is provided by the A/
µ companding control bit while the coding
scheme is controlled by the sign-mag/CCITT control bit. Both of these reside in Control Register 2 (address 0Fh).
Table 1 illustrates these choices.
Table 1
The Filter/CODEC autonull circuit ensures that transmit PCM will contain no more than
±1 bit of offset due to
internal circuitry.
Digital Gain and Tone Generation
The Digital gain and Tone generator block is located, functionally, between the serial FDI port and the Filter/CODEC
block. Its main function is to provide digital gain control of the transmit and receive audio signals and to generate
digital patterns for DTMF and tone ringer signals.
Gain Control
Gain control is performed on linear code for both the receive and the transmit PCM. Gain control is set via the
Digital Gain Control Register at address 19h. Gain, in 3.0 dB increments, is available within a range of +21.0 dB to
-24 dB.
DTMF Generator
The digital DTMF circuit generates a dual sine-wave pattern which may be routed into the receive path as comfort
tones or into the transmit path as network signalling. In both cases the digitally generated signal will undergo gain
adjustment as programmed into the transmit and receive gain control registers. Gain control is assigned
automatically as functions are selected via the transmit and receive path control registers.
The composite signal output level in the transmit direction is -4 dBm0 (
µ-Law) and -10 dBm0 (A-law) with
programmable gains at zero dB. Pre-twist of 2.0 dB is incorporated into the composite signal resulting in a low tone
output level of -8.12 dBm0 and a high group level of -6.12 dBm0 (for
µ-Law, 6 dB lower for A-Law). Note that these
levels will be influenced by the Anti-Howling circuit when it is enabled (see Anti-Howling section for more details).
DTMF side-tone levels are set to -28 dBm0 from the generator circuit. Other receive path gains must be included
when calculating the analog output signal levels. Adjustments to these levels may be made by altering the settings
of the Gain Control register (address 19h).
Code
Sign/
Magnitude
CCITT (G.711)
µ-Law
A-Law
+ Full Scale
1111 1111
1000 0000
1010 1010
+ Zero
1000 0000
1111 1111
1101 0101
-Zero
(quiet code)
0000 0000
0111 1111
0101 0101
- Full Scale
0111 1111
0000 0000
0010 1010


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