MT9173/74

Data Sheet

2

Zarlink Semiconductor Inc.

Figure 2 - Pin Connections

Pin Description

Pin #

Name

Description

24

28

12

23

Internal Bias Voltage output. Connect via 0.33

34

Internal Reference Voltage output. Connect via 0.33

4,5,

6

5,7,

8

MS2-MS0 Mode Select inputs (Digital). The logic levels present on these pins select the various

operating modes for a particular application. See Table 1 for the operating modes.

7

9

RegC

Regulator Control output (Digital). A 512 kHz clock used for switch mode power

supplies. Unused in MAS/MOD mode and should be left open circuit.

810

RxSB

Receive Sync Bit output (Digital). In DN mode, this output is held high until receive

synchronization occurs (i.e., until the sync bit in Status Register =1). Once low,

indicating synchronized transmission, a high going pulse (6.24

µs wide pulse @

160 kb/s and 12.5

µs wide @ 80 kb/s) indicates the temporal position of the receive

"SYNC" bit in the biphase line transmission. Inactive and low in MOD mode.

911

F0/CLD

Frame Pulse/C-Channel Load (Digital). In DN mode a 244 ns wide negative pulse

input for the MASTER indicating the start of the active channel times of the device.

Output for the SLAVE indicating the start of the active channel times of the device.

Output in MOD mode providing a pulse indicating the start of the C-channel.

10

12

CDSTi/

CDi

Control/Data ST-BUS In/Control/Data In (Digital). A 2.048 Mbit/s serial control &

signalling input in DN mode. In MOD mode this is a continuous bit stream at the bit

rate selected.

11

13

CDSTo/

CDo

Control/Data ST-BUS Out/Control/Data Out (Digital). A 2.048 Mbit/s serial control &

signalling output in DN mode. In MOD mode this is a continuous bit stream at the bit

rate selected.

12

14

Negative Power Supply (0 V).

13

15

DSTo/Do Data ST-BUS Out/Data Out (Digital). A 2.048 Mbit/s serial PCM/data output in DN

mode. In MOD mode this is a continuous bit stream at the bit rate selected.

28 PIN PLCC

5

6

7

8

9

10

11

25

24

23

22

21

20

19

²

NC

LOUT DIS

Precan

OSC1

OSC2

NC

C4/TCK

MS2

NC

MS1

MS0

RegC

F0/CLD

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

24

23

22

21

20

19

18

17

24 PIN PDIP/ SSOP

LOUT

VBias

VRef

MS2

MS1

MS0

RegC

F0/CLD

CDSTi/CDi

CDSTo/CDo

VSS

RxSB

VDD

LIN

TEST

LOUT DIS

Precan

OSC1

OSC2

C4/TCK

F0o/RCK

DSTi/Di

DSTo/Do

NC

RxSB