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MC100ELT28DTG Datasheet(PDF) 1 Page - ON Semiconductor |
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MC100ELT28DTG Datasheet(HTML) 1 Page - ON Semiconductor |
1 / 9 page © Semiconductor Components Industries, LLC, 2006 December, 2006 − Rev. 9 1 Publication Order Number: MC10ELT28/D MC10ELT28, MC100ELT28 5 VTTL to Differential PECL and Differential PECL to TTL Translator Description The MC10ELT/100ELT28 is a differential PECL to TTL translator and a TTL to differential PECL translator in a single package. Because PECL (Positive ECL) levels are used, only +5 V and ground are required. The small outline 8-lead package and the dual translation design of the ELT28 makes it ideal for applications which are sending and receiving signals across a backplane. The 100 Series contains temperature compensation. Features • 3.5 ns Typical PECL to TTL Propagation Delay • 1.2 ns Typical TTL to PECL Propagation Delay • PNP TTL Inputs for Minimal Loading • 24 mA TTL Outputs • Flow Through Pinouts • Operating Range VCC= 4.75 V to 5.25 V with GND= 0 V • QTTL Output Will Default High with Inputs Left Open or < 1.3 V • QECL Output Will Default High with Inputs Left Open • Internal PECL Input Pulldown Resistors • Pb−Free Packages are Available A = Assembly Location L = Wafer Lot Y = Year W = Work Week G = Pb−Free Package H = MC10 K = MC100 5G = MC10 2V = MC100 M = Date Code SOIC−8 D SUFFIX CASE 751 MARKING DIAGRAMS* TSSOP−8 DT SUFFIX CASE 948R ALYWG G HT28 ALYWG G KT28 1 8 1 8 1 8 http://onsemi.com *For additional marking information, refer to Application Note AND8002/D. See detailed ordering and shipping information in the package dimensions section on page 6 of this data sheet. ORDERING INFORMATION 1 8 HLT28 ALYW G 1 8 KLT28 ALYW G 1 8 DFN8 MN SUFFIX CASE 506AA 14 14 (Note: Microdot may be in either location) |
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