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BUK565-60A Datasheet(PDF) 5 Page - NXP Semiconductors |
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BUK565-60A Datasheet(HTML) 5 Page - NXP Semiconductors |
5 / 7 page Philips Semiconductors Product specification PowerMOS transistor BUK565-60A Logic level FET Fig.13. Typical turn-on gate-charge characteristics. V GS = f(QG); conditions: ID = 39 A; parameter VDS Fig.14. Typical reverse diode current. I F = f(VSDS); conditions: VGS = 0 V; parameter Tj Fig.15. Normalised avalanche energy rating. W DSS% = f(Tmb); conditions: ID = 39 A Fig.16. Avalanche energy test circuit. 0 20 40 QG / nC VGS / V 12 10 8 6 4 2 0 VDS / V =10 40 BUK555-50 20 40 60 80 100 120 140 160 180 Tmb / C 120 110 100 90 80 70 60 50 40 30 20 10 0 WDSS% 0 1 2 BUK555-50A VSDS / V 100 50 0 IF / A Tj / C = 150 25 L T.U.T. VDD RGS R 01 VDS -ID/100 + - shunt VGS 0 W DSS = 0.5 ⋅ LID 2 ⋅ BV DSS/(BVDSS − VDD) February 1996 5 Rev 1.000 |
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