Electronic Components Datasheet Search |
|
K4M51323PC-SE1L Datasheet(PDF) 1 Page - Samsung semiconductor |
|
K4M51323PC-SE1L Datasheet(HTML) 1 Page - Samsung semiconductor |
1 / 12 page K4M51323PC-S(D)E/G/C/F February 2006 Mobile-SDRAM FEATURES GENERAL DESCRIPTION 4M x 32Bit x 4 Banks Mobile SDRAM in 90FBGA Address configuration Organization Bank Row Column Address 16Mx32 BA0,BA1 A0 - A12 A0 - A8 INFORMATION IN THIS DOCUMENT IS PROVIDED IN RELATION TO SAMSUNG PRODUCTS, AND IS SUBJECT TO CHANGE WITHOUT NOTICE. NOTHING IN THIS DOCUMENT SHALL BE CONSTRUED AS GRANTING ANY LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IN SAMSUNG PRODUCTS OR TECHNOLOGY. ALL INFORMATION IN THIS DOCUMENT IS PRO- VIDED ON AS "AS IS" BASIS WITHOUT GUARANTEE OR WARRANTY OF ANY KIND. 1. For updates or additional information about Samsung products, contact your nearest Samsung office. 2. Samsung products are not intended for use in life support, critical care, medical, safety equipment, or similar applications where Product failure could result in loss of life or personal or physical harm, or any military or defense application, or any governmental procurement to which special terms or pro- visions may apply. • 1.8V power supply. • LVCMOS compatible with multiplexed address. • Four banks operation. • MRS cycle with address key programs. -. CAS latency (1, 2 & 3). -. Burst length (1, 2, 4, 8 & Full page). -. Burst type (Sequential & Interleave). • EMRS cycle with address key programs. • All inputs are sampled at the positive going edge of the system clock. • Burst read single-bit write operation. • Special Function Support. -. PASR (Partial Array Self Refresh). -. Internal TCSR (Temperature Compensated Self Refresh) -. DS (Driver Strength) -. DPD (Deep Power Down) • DQM for masking. • Auto refresh. • 64ms refresh period (8K cycle). • Extended Temperature Operation (-25 °C ~ 85°C). • Commercial Temperature Operation (-25 °C ~ 70°C). • 90Balls FBGA( -SXXX -Pb, -DXXX -Pb Free). The K4M51323PC is 536,870,912 bits synchronous high data rate Dynamic RAM organized as 4 x 4,196,304 words by 32 bits, fabricated with SAMSUNG’s high performance CMOS technol- ogy. Synchronous design allows precise cycle control with the use of system clock and I/O transactions are possible on every clock cycle. Range of operating frequencies, programmable burst lengths and programmable latencies allow the same device to be useful for a variety of high bandwidth and high per- formance memory system applications. ORDERING INFORMATION - S(D)E/G : Normal / Low Power, Extended Temperature(-25 °C ~ 85°C) - S(D)C/F : Normal / Low Power, Commercial Temperature(-25 °C ~ 70°C) Notes : 1. In case of 40MHz Frequency, CL1 can be supported. Part No. Max Freq. Interface Package K4M51323PC-S(D)E/G/C/F75 133MHz(CL=3),83MHz(CL=2) LVCMOS 90 FBGA Pb (Pb Free) K4M51323PC-S(D)E/G/C/F90 111MHz(CL=3),83MHz(CL=2) K4M51323PC-S(D)E/G/C/F1L 111MHz(CL=3)*1,66MHz(CL2) |
Similar Part No. - K4M51323PC-SE1L |
|
Similar Description - K4M51323PC-SE1L |
|
|
Link URL |
Privacy Policy |
ALLDATASHEET.COM |
Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Datasheet Upload | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |