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DSP56004FJ81 Datasheet(PDF) 1 Page - Freescale Semiconductor, Inc |
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DSP56004FJ81 Datasheet(HTML) 1 Page - Freescale Semiconductor, Inc |
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1 / 82 page  MOTOROLA SEMICONDUCTOR TECHNICAL DATA DSP56004 DSP56004ROM Order this document by: DSP56004/D, Rev. 3 ©1996, 1997 MOTOROLA, INC. SYMPHONY™ AUDIO DSP FAMILY 24-BIT DIGITAL SIGNAL PROCESSORS Motorola designed the Symphony™ family of high-performance, programmable Digital Signal Processors (DSPs) to support a variety of digital audio applications, including Dolby ProLogic, ATRAC, and Lucasfilm Home THX processing. Software for these applications is licensed by Motorola for integration into products like audio/video receivers, televisions, and automotive sound systems with such user-developed features as digital equalization and sound field processing. The DSP56004 is an MPU-style general purpose DSP, composed of an efficient 24-bit Digital Signal Processor core, program and data memories, various peripherals optimized for audio, and support circuitry. As illustrated in Figure 1, the DSP56000 core family compatible DSP is fed by program memory, two independent data RAMs and two data ROMs, a Serial Audio Interface (SAI), Serial Host Interface (SHI), External Memory Interface (EMI), dedicated I/O lines, on-chip Phase Lock Loop (PLL), and On-Chip Emulation (OnCE ™) port. Figure 1 DSP56004 Block Diagram Y Data Memory* X Data Memory* Program Memory* Program Control Unit 24-Bit DSP56000 Core OnCETM Port PLL Clock Gen. 4 9 5 29 16-Bit Bus 24-Bit Bus Interrupt Control 4 IRQA , IRQB, NMI, RESET 4 3 Address Generation Unit PAB XAB YAB GDB PDB XDB YDB General Purpose Input/ Output External Memory Interface (EMI) Serial Audio Interface (SAI) Serial Host Interface (SHI) AA0248 *Refer to Table 1 for memory configurations. Internal Data Bus Switch Program Decode Controller Program Address Generator Data ALU 24 × 24 + 56 → 56-bit MAC Two 56-Bit Accumulators Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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