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SST55LD019C-45-I-TQWE Datasheet(PDF) 11 Page - Silicon Storage Technology, Inc |
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SST55LD019C-45-I-TQWE Datasheet(HTML) 11 Page - Silicon Storage Technology, Inc |
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11 / 79 page  Data Sheet ATA Flash Disk Controller SST55LD019A / SST55LD019B / SST55LD019C ©2006 Silicon Storage Technology, Inc. S71241-04-000 12/06 11 WP_PD# 62 D2 F9 I I1U The WP_PD# pin can be used for either the Write Protect mode or Power-down mode, but only one mode is active at any time. The Write Protect or Power-down modes can be selected through the host command. The Write Protect mode is the fac- tory default setting. Flash Media Interface FWP# 97 H7 B4 O O5 Active Low Flash Media Chip Write Protect Connect this pin to the NAND flash media Write Protect pin FRDYbsy# 82 J3 A8 I I4U Flash Media Chip Ready/Busy# Signal high is flash media ready signal. Low is busy. FRE# 84 H3 B7 OO5 Active Low Flash Media Chip Read FWE# 96 J7 A4 Active Low Flash Media Chip Write FCLE 92 K6 C6 Active High Flash Media Chip Command Latch Enable FALE 94 H6 B5 Active High Flash Media Chip Address Latch Enable FAD15 46 A3 K8 I/O I3U/O5 Flash Media Chip High Byte Address/Data Bus pins FAD14 44 B4 K7 FAD13 42 C5 H6 FAD12 40 A5 J5 FAD11 35 C7 H5 FAD10 33 A7 K3 FAD9 31 B8 J3 FAD8 29 B9 J2 FAD7 45 C4 J7 I/O I3U/O5 Flash Media Chip Low Byte Address/Data Bus pins FAD6 43 A4 J6 FAD5 41 B5 K6 FAD4 39 C6 K5 FAD3 34 B7 J4 FAD2 32 C8 H4 FAD1 30 A8 K2 FAD0 28 A9 H3 FCE6# 91 H5 B6 O O4 Active Low Flash Media Chip Enable pin FCE5# 95 K7 C5 FCE4# 93 J6 A5 FCE3# 89 J5 A6 FCE2# 88 H4 C7 FCE1# 80 K3 B8 FCE0# 86 J4 A7 FCE7#/ INTCLKEN 26 C9 J1 O I3D/O4 Active Low Flash Media Chip Enable pin This pin is sensed during the Power-on Reset (POR) to select an internal clock mode. If this pin is pulled up during the Power-on Reset then the internal clock is selected. TABLE 3-1: Pin Assignments (Continued) (2 of 4) Symbol Pin No. Pin Type I/O Type1 Name and Functions 100-TQFP 85- VFBGA 84- TFBGA |
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