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SN74AHC573PWR Datasheet(PDF) 1 Page - Texas Instruments |
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SN74AHC573PWR Datasheet(HTML) 1 Page - Texas Instruments |
1 / 18 page SN54AHC573, SN74AHC573 OCTAL TRANSPARENT DTYPE LATCHES WITH 3STATE OUTPUTS SCLS242K − OCTOBER 1995 − REVISED JANUARY 2004 1 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 D Operating Range 2-V to 5.5-V VCC D 3-State Outputs Directly Drive Bus Lines D Latch-Up Performance Exceeds 250 mA Per JESD 17 description/ordering information The ’AHC573 devices are octal transparent D-type latches designed for 2-V to 5.5-V VCC operation. When the latch-enable (LE) input is high, the Q outputs follow the data (D) inputs. When LE is low, the Q outputs are latched at the logic levels of the D inputs. A buffered output-enable (OE) input can be used to place the eight outputs in either a normal logic state (high or low) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without interface or pullup components. OE does not affect the internal operations of the latches. Old data can be retained or new data can be entered while the outputs are in the high-impedance state. To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. ORDERING INFORMATION TA PACKAGE† ORDERABLE PART NUMBER TOP-SIDE MARKING PDIP − N Tube SN74AHC573N SN74AHC573N SOIC − DW Tube SN74AHC573DW AHC573 SOIC − DW Tape and reel SN74AHC573DWR AHC573 −40 °C to 85°C SOP − NS Tape and reel SN74AHC573NSR AHC573 −40 °C to 85°C SSOP − DB Tape and reel SN74AHC573DBR HA573 TSSOP − PW Tube SN74AHC573PW HA573 TSSOP − PW Tape and reel SN74AHC573PWR HA573 TVSOP − DGV Tape and reel SN74AHC573DGVR HA573 CDIP − J Tube SNJ54AHC573J SNJ54AHC573J −55 °C to 125°C CFP − W Tube SNJ54AHC573W SNJ54AHC573W −55 C to 125 C LCCC − FK Tube SNJ54AHC573FK SNJ54AHC573FK † Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. Copyright 2004, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. SN54AHC573 ...J OR W PACKAGE SN74AHC573 . . . DB, DGV, DW, N, NS, OR PW PACKAGE (TOP VIEW) SN54AHC573 . . . FK PACKAGE (TOP VIEW) 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 OE 1D 2D 3D 4D 5D 6D 7D 8D GND VCC 1Q 2Q 3Q 4Q 5Q 6Q 7Q 8Q LE 32 1 20 19 910 11 12 13 4 5 6 7 8 18 17 16 15 14 2Q 3Q 4Q 5Q 6Q 3D 4D 5D 6D 7D On products compliant to MILPRF38535, all parameters are tested unless otherwise noted. On all other products, production processing does not necessarily include testing of all parameters. |
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