4

Data Sheet

16 Mbit Concurrent SuperFlash + 4/8 Mbit PSRAM ComboMemory

SST34HF1641J / SST34HF1681J

©2006 Silicon Storage Technology, Inc.

S71336-00-000

8/06

The actual completion of the nonvolatile write is asynchro-

nous with the system; therefore, either a Ready/Busy# (RY/

simultaneous with the completion of the Write cycle. If this

occurs, the system may possibly get an erroneous result,

result occurs, the software routine should include a loop to

read the accessed location an additional two (2) times. If

both reads are valid, then the device has completed the

Write cycle, otherwise the rejection is valid.

Ready/Busy# (RY/BY#)

The SST34HF16x1J include a Ready/Busy# (RY/BY#)

output signal. RY/BY# is an open drain output pin that indi-

cates whether an Erase or Program operation is in

progress. Since RY/BY# is an open drain output, it allows

pull-up resistor. After the rising edge of the final WE# pulse

in the command sequence, the RY/BY# status is valid.

When RY/BY# is actively pulled low, it indicates that an

Erase or Program operation is in progress. When RY/BY#

is high (Ready), the devices may be read or left in standby

mode.

Byte/Word (CIOF)

This function, found only on the 56-ball package, includes a

CIOF pin to control whether the device data I/O pins oper-

active and controlled by BEF# and OE#.

If the CIOF pin is at logic “0”, the device is in x8 data config-

When the devices are in an internal Program operation, any

will produce true data. During internal Erase operation, any

Data# Polling is valid after the rising edge of fourth WE# (or

BEF#) pulse for Program operation. For Sector-, Block-, or

Chip-Erase, the Data# Polling is valid after the rising edge

of sixth WE# (or BEF#) pulse. See Figure 12 for Data# Poll-

During the internal Program or Erase operation, any con-

and “0”s, i.e., toggling between 1 and 0. When the internal

stop toggling. The device is then ready for the next opera-

tion. The toggle bit is valid after the rising edge of the fourth

WE# (or BEF#) pulse for Program operations. For Sector-,

“1” if a Read operation is attempted on an Erase-sus-

pended Sector/Block. If Program operation is initiated in a

toggle.

sector is being actively erased or erase-suspended. Table 1

is valid after the rising edge of the last WE# (or BEF#)

pulse of a Write operation. See Figure 13 for Toggle Bit tim-

ing diagram and Figure 25 for a flowchart.

progress in order to read the operation status. If the address is pointing to a different bank (not busy), the device will output array data.

TABLE

1: Write Operation Status

Status

RY/BY#

Normal Operation

Standard Program

DQ7#

Toggle

No Toggle

0

Standard Erase

0

Toggle

Toggle

0

Erase-Suspend Mode

Read From Erase Suspended Sector/Block

1

1

Toggle

1

Read From Non-Erase Suspended Sector/Block

Data

Data

Data

1

Program

DQ7#

Toggle

No Toggle

0

T1.2 1336