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SST32HF3242C-70-4E-LS Datasheet(PDF) 8 Page - Silicon Storage Technology, Inc |
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SST32HF3242C-70-4E-LS Datasheet(HTML) 8 Page - Silicon Storage Technology, Inc |
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8 / 36 page  8 Preliminary Specifications Multi-Purpose Flash Plus + SRAM ComboMemory SST32HF1642 / SST32HF1682 / SST32HF3242 / SST32HF3282 SST32HF1622C / SST32HF1642C / SST32HF3242C ©2005 Silicon Storage Technology, Inc. S71253-03-000 5/05 TABLE 4: PIN DESCRIPTION Symbol Pin Name Functions AMS1 to A0 Address Inputs To provide flash address, AMS-A0. To provide SRAM address, AMS-A0 DQ15-DQ0 Data Inputs/Outputs To output data during Read cycles and receive input data during Write cycles. Data is internally latched during a flash Erase/Program cycle. The outputs are in tri-state when OE# is high or BES1# is high or BES2 is low and BEF# is high. BEF# Flash Memory Bank Enable To activate the Flash memory bank when BEF# is low BES1# SRAM Memory Bank Enable To activate the SRAM memory bank when BES1# is low BES2 SRAM Memory Bank Enable To activate the SRAM memory bank when BES2 is high OEF#2 Output Enable To gate the data output buffers for Flash2 only OES#2 Output Enable To gate the data output buffers for SRAM2 only WEF#2 Write Enable To control the Write operations for Flash2 only WES#2 Write Enable To control the Write operations for SRAM2 only OE# Output Enable To gate the data output buffers WE# Write Enable To control the Write operations UBS# Upper Byte Control (SRAM) To enable DQ15-DQ8 LBS# Lower Byte Control (SRAM) To enable DQ7-DQ0 WP# Write Protect To protect and unprotect sectors from Erase or Program operation RST# Reset To Reset and return the device to Read mode VSSF2 Ground Flash2 only VSSS2 Ground SRAM2 only VSS Ground VDDF Power Supply (Flash) 2.7-3.3V Power Supply to Flash only VDDS Power Supply (SRAM) 2.7-3.3V Power Supply to SRAM only NC No Connection Unconnected pins T4.2 1253 1. AMS = Most Significant Address AMS = A19 for SST32HF16x2x and A20 for SST32HF32x2x 2. LS package only |
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