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ZL20200 Datasheet(PDF) 8 Page - Zarlink Semiconductor Inc |
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ZL20200 Datasheet(HTML) 8 Page - Zarlink Semiconductor Inc |
8 / 51 page ZL20200 Data Sheet 8 Zarlink Semiconductor Inc. 1.0 General Description A detailed block diagram is shown in Figure 3. This shows the receive and transmit paths plus the LO generation circuitry. Control is via a serial bus with the addition of direct inputs to control receive and transmit modes and optimize power consumption. Figure 3 - ZL20200 Detailed Block Diagram RSSI RX Q+ RX Q– π/2 π/2 Serial interface AMPS demod. and RSSI LO Select and Doubler 60kHz PLL PLL PLL π/2 π/2 Control 43 44 RX I+ RX I– 45 46 41 42 40 FM OUT FM FB 32 33 27 28 1 2 3 TX I+ TX I– TX Q+ TX Q– SDAT SCLK SLATCH 56 34 20 11 10 21 26 25 22 23 VCC CONTROL TX RXB ENABLE2 ENABLE1 RESETB 24 15 17 18 19 16 TX 900 TX 1900 51 55 54 9 8 12 14 6 RX GAIN IF1 IN+ IF1 IN– 1900 LO OUT 900 LO OUT 900 LO IN 1900 LO IN 13 29 35 4 39 48 31 38 49 47 37 30 TCXO I SET VCC RX PLL VCC TX PLL VCC VHF CP 7 50 5 36 LOCK DET MUX Option Tank Circuit Tank Circuit Control Σ ÷ N π/2 Loop Filter Loop Filter Loop Filter Option |
Similar Part No. - ZL20200 |
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Similar Description - ZL20200 |
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