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LMD18200 Datasheet(PDF) 4 Page - National Semiconductor (TI) |
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LMD18200 Datasheet(HTML) 4 Page - National Semiconductor (TI) |
4 / 14 page Electrical Characteristics Notes Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. DC and AC electrical specifications do not apply when operating the device beyond its rated operating conditions. Note 2: See Application Information for details regarding current limiting. Note 3: The maximum power dissipation must be derated at elevated temperatures and is a function of TJ(max), θJA, and TA. The maximum allowable power dissipation at any temperature is PD(max) =(TJ(max) −TA)/θJA, or the number given in the Absolute Ratings, whichever is lower. The typical thermal resistance from junction to case ( θJC) is 1.0˚C/W and from junction to ambient (θJA) is 30˚C/W. For guaranteed operation TJ(max) = 125˚C. Note 4: Human-body model, 100 pF discharged through a 1.5 k Ω resistor. Except Bootstrap pins (pins 1 and 11) which are protected to 1000V of ESD. Note 5: All limits are 100% production tested at 25˚C. Temperature extreme limits are guaranteed via correlation using accepted SQC (Statistical Quality Control) methods. All limits are used to calculate AOQL, (Average Outgoing Quality Level). Note 6: Output currents are pulsed (tW < 2 ms, Duty Cycle < 5%). Note 7: Regulation is calculated relative to the current sense output value with a 1A load. Note 8: Selections for tighter tolerance are available. Contact factory. Typical Performance Characteristics V SAT vs Flag Current R DS(ON) vs Temperature 01056816 01056817 R DS(ON) vs Supply Voltage Supply Current vs Supply Voltage 01056818 01056819 www.national.com 4 |
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