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NJ8821MADG Datasheet(PDF) 2 Page - General Electric Company |
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NJ8821MADG Datasheet(HTML) 2 Page - General Electric Company |
2 / 5 page NJ8821 mA mA V V V V V V µA V V V V V V fosc, fFIN = 10MHz fosc, fFIN = 1·0MHz ISOURCE = 1mA ISINK = 1mA ISINK = 4mA ISOURCE = 5mA ISINK = 5mA TTL compatible See note 1 5·5 1·5 0·4 0·4 7 0·4 ±0·1 0·4 0·75 0·75 Supply current OUTPUT LEVELS Modulus Control Output (MC) High level Low level Lock Detect Output (LD) Low level Open drain pull-up voltage PDB Output High level Low level 3-state leakage current INPUT LEVELS Data Inputs (D0-D3) High level Low level Program Enable Input (PE) High level Low level Data Select Inputs (DS0-DS2) High level Low level 4·6 4·6 4·25 4·25 4·25 2 ELECTRICAL CHARACTERISTICS AT VDD = 5V Test conditions unless otherwise stated: VDD–VSS=5V ±0·5V. Temperature range NJ8821 BA: –30°C to +70°C; NJ8821MA: –40°C to +85°C DC Characteristics Value Typ. Max. Characteristic Min. 3·5 0·7 Units Conditions 0 to 5V square wave mVRMS MHz ns µs µs µs µs µs ns k Ω nF k Ω V/Rad 50 1 5 FIN and OSC IN input level Max. operating frequency, fFIN and fosc Propagation delay, clock to MC Strobe pulse width, tW(ST) Data set-up time, tDS Data hold time, tDH Latch address set-up time, tSE Latch address hold time, tHE Digital phase detector propagation delay Gain programming resistor, RB Hold capacitor, CH Output resistance, PDA Digital phase detector gain 30 500 0·4 AC Characteristics Value Typ. Max. Characteristic Min. Units Conditions 200 10·6 2 1 1 1 1 5 10MHz AC-coupled sinewave Input squarewave VDD to VSS, See note 4. See note 2. See Fig. 6 See note 3. NOTES 1. Data inputs have internal pull-up resistors to enable them to be driven from TTL outputs. 2. All counters have outputs directly synchronous with their respective clock rising edges. 3. The finite output resistance of the internal voltage follower and ‘on’ resistance of the sample switch driving this pin will add a finite time constant to the loop. An external 1nF hold capacitor will give a maximum time constant of 5 µs, typically. 4. Operation at up to 15MHz is possible with a full logic swing but is not guaranteed. |
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