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MB90F352ESPMC Datasheet(PDF) 5 Page - Fujitsu Component Limited. |
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MB90F352ESPMC Datasheet(HTML) 5 Page - Fujitsu Component Limited. |
5 / 85 page MB90350E Series 5 ■ PRODUCT LINEUP1 (Without Clock supervisor function) •Flash memory products (Continued) Part Number Parameter MB90F351E, MB90F352E MB90F351TE, MB90F352TE MB90F351ES, MB90F352ES MB90F351TES, MB90F352TES Type Flash memory products CPU F2MC-16LX CPU System clock PLL clock multiplication circuit ( ×1, ×2, ×3, ×4, ×6, 1/2 when PLL stops) Minimum instruction execution time : 42 ns (oscillation clock 4 MHz, PLL × 6) ROM 64 Kbytes Flash memory : MB90F351E(S), MB90F351TE(S) 128 Kbytes Dual operation Flash memory (Erase/write and read can be operated at the same time) : MB90F352E(S), MB90F352TE(S) RAM 4 Kbytes Emulator-specific power supply*1 ⎯ Sub clock pin (X0A, X1A) (Max 100 kHz) Yes No Clock supervisor No Low voltage/CPU operation detection reset No Yes No Yes Operating voltage 3.5 V to 5.5 V : at normal operating (not using A/D converter) 4.0 V to 5.5 V : at using A/D converter/Flash programming 4.5 V to 5.5 V : at using external bus Operating temperature −40 °C to +125 °C Package LQFP-64 UART 2 channels Wide range of baud rate settings using a dedicated reload timer Special synchronous options for adapting to different synchronous serial protocols LIN functionality working either as master or slave LIN device I2C (400 kbps) 1 channel A/D converter 15 channels 10-bit or 8-bit resolution Conversion time : Min 3 µs includes sample time (per one channel) 16-bit reload timer (2 channels) Operation clock frequency : fsys/21, fsys/23, fsys/25 (fsys = Machine clock frequency) Supports External Event Count function. 16-bit I/O timer (2 channels) I/O Timer 0 (clock input FRCK0) corresponds to ICU0/1. I/O Timer 1 (clock input FRCK1) corresponds to ICU4/5/6/7, OCU4/5/6/7. Signals an interrupt when overflowing. Supports Timer Clear when it matches Output Compare (ch.0, ch.4) . Operation clock frequency : fsys, fsys/21, fsys/22, fsys/23, fsys/24, fsys/25, fsys/26, fsys/27 (fsys = Machine clock frequency) 16-bit output compare 4 channels Signals an interrupt when 16-bit I/O Timer matches with output compare registers. A pair of compare registers can be used to generate an output signal. |
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