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MT88E39AS1 Datasheet(PDF) 11 Page - Zarlink Semiconductor Inc |
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MT88E39AS1 Datasheet(HTML) 11 Page - Zarlink Semiconductor Inc |
11 / 16 page MT88E39 Data Sheet 11 Zarlink Semiconductor Inc. † AC Electrical Characteristics are over recommended operating conditions unless otherwise stated. ‡ Typical figures are at 25 °C and are for design aid only, not guaranteed and not subject to production testing. Notes*: 1. The device will stop functioning within this time, but more time may be required to reach IDDQ. † AC Electrical Characteristics are over recommended operating conditions unless otherwise stated. ‡ Typical figures are at 25 °C and are for design aid only, not guaranteed and not subject to production testing. Notes*: 1. FSK input data at 1200 ±12 baud. 2. OSC1 at 3.579545 MHz ±0.2%. 3. 10 k to VSS, 50pF to VSS. 4. 10 k to VDD, 50pF to VSS. 5. Function of signal condition. 6. For a repeating mark space sequence, the data stream will typically have equal 1 and 0 bit durations. AC Electrical Characteristics† - Timing Characteristics Sym. Min. Typ.‡ Max. Units Notes* 1 PWDN OSC1 Power-up time tPU 50 ms 2 Power-down time tPD 100 1000 µs1 3 CD Input FSK to CD low delay tIAL 25 ms 4 Input FSK to CD high delay tIAH 10 ms 5Hysteresis 10 ms AC Electrical Characteristics† - 3-Wire FSK Interface Timing (Mode 0) Characteristics Sym. Min. Typ.‡ Max. Units. Notes* 1 DATA Rate 1188 1200 1212 bps 1, 6 2 Input FSK to DATA delay tIDD 15 ms 3 DATA DCLK Rise time tR 200 ns 3 4 Fall time tF 200 ns 3 5 DATA to DCLK delay tDCD 6416 µs 1, 2, 5, 6 6 DCLK to DATA delay tCDD 6416 µs 1, 2, 5, 6 7 DCLK Frequency 1200.4 1202.8 1205.2 Hz 2 8 High time tCH 415 416 417 µs2 9 Low time tCL 415 416 417 µs2 10 DCLK DR DCLK to DR delay tCRD 415 416 417 µs2 11 DR Rise time tRR 10 µs4 12 Fall time tFF 200 ns 4 13 Low time tRL 415 416 417 µs2 |
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