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M34C02-LDW1P Datasheet(PDF) 9 Page - STMicroelectronics |
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M34C02-LDW1P Datasheet(HTML) 9 Page - STMicroelectronics |
9 / 31 page M34C02-W, M34C02-L, M34C02-R Signal description 9/31 2.5 Supply voltage (VCC) 2.5.1 Operating supply voltage VCC Prior to selecting the memory and issuing instructions to it, a valid and stable VCC voltage within the specified [VCC(min), VCC(max)] range must be applied (see Table 6, Table 7 and Table 8). In order to secure a stable DC supply voltage, it is recommended to decouple the VCC line with a suitable capacitor (usually of the order of 10nF to 100nF) close to the VCC/VSS package pins. This voltage must remain stable and valid until the end of the transmission of the instruction and, for a Write instruction, until the completion of the internal write cycle (tW). 2.5.2 Internal device reset In order to prevent inadvertent Write operations during Power-up, a Power On Reset (POR) circuit is included. At Power-up (continuous rise of VCC), the device will not respond to any instruction until VCC has reached the Power On Reset threshold voltage (this threshold is lower than the minimum VCC operating voltage defined in Table 6, Table 7 and Table 8). When VCC has passed the POR threshold, the device is reset and in the Standby Power mode. 2.5.3 Power-down At Power-down (where VCC decreases continuously), as soon as VCC drops from the normal operating voltage to below the Power On Reset threshold voltage, the device stops responding to any instruction sent to it. During Power-down, the device must be deselected and in Standby Power mode (that is there should be no internal Write cycle in progress). Figure 4. Maximum RP value versus bus parasitic capacitance (C) for an I²C Bus AI01665b VCC C SDA RP MASTER RP SCL C 100 0 4 8 12 16 20 C (pF) 10 1000 fc = 400kHz fc = 100kHz |
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