 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
DSP56F827 Datasheet(PDF) 5 Page - Motorola, Inc |
|
||||||||||||||||||||||||||||||
DSP56F827 Datasheet(HTML) 5 Page - Motorola, Inc |
|
|
5 / 44 page  Introduction DSP56F826 Preliminary Technical Data 5 Part 2 Signal/Connection Descriptions 2.1 Introduction The input and output signals of the DSP56F826 are organized into functional groups, as shown in Table 2 and as illustrated in Figure 2. In Table 3 describes the signal or signals present on a pin. Table 2. Functional Group Pin Allocations Functional Group Number of Pins Power (VDD , VDDIO or VDDA) (3,4,1) Ground (VSS , VSSIO or VSSA ) (3,4,1) PLL and Clock 3 Address Bus1 16 Data Bus 16 Bus Control 4 Interrupt and Program Control 5 Dedicated General Purpose Input/Output 16 Synchronous Serial Interface (SSI) Port 6 Serial Peripheral Interface (SPI) Port1 1. Alternately, GPIO pins 4 Serial Communications Interface (SCI) Ports 4 Quad Timer Module Ports 4 JTAG/On-Chip Emulation (OnCE) 6 |
Similar Part No. - DSP56F827 |
|
Similar Description - DSP56F827 |
|
|
Link URL |
| Privacy Policy |
| ALLDATASHEET.COM |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Datasheet Upload | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
