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MAX3965CD Datasheet(PDF) 6 Page - Maxim Integrated Products

Part # MAX3965CD
Description  3.0V to 5.5V, 125Mbps to 266Mbps Limiting Amplifiers with Loss-of-Signal Detector
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Manufacturer  MAXIM [Maxim Integrated Products]
Direct Link  https://www.maximintegrated.com/en.html
Logo MAXIM - Maxim Integrated Products

MAX3965CD Datasheet(HTML) 6 Page - Maxim Integrated Products

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+3.0V to +5.5V, 125Mbps to 266Mbps
Limiting Amplifiers with Loss-of-Signal Detector
6
_______________________________________________________________________________________
Detailed Description
The MAX3964A contains a series of limiting amplifiers
and power detectors, offset correction, data-squelch
circuitry, and PECL output buffers for data and loss-of-
signal (LOS) outputs. The MAX3965 is functionally the
same, but it provides TTL buffers on the LOS outputs.
The MAX3968 provides PECL LOS outputs with data
outputs suitable for 266Mbps. Figure 1 shows a func-
tional diagram of the MAX3964A/MAX3965/MAX3968.
Limiting Amplifiers
A series of four limiting amplifiers provides gain of
approximately 65dB.
Power Detector
Each amplifier stage contains a full-wave logarithmic
detector (FWD), which indicates the RMS input signal
power. The FWD outputs are summed together at the
FILTER pin where the signal is filtered by an external
capacitor (CFILTER) connected between FILTER and
VCC. The FILTER signal generates the RSSI output volt-
age, which is proportional to the input power in deci-
bels. When LOS+ is low, VRSSI is approximated by the
following equation:
VRSSI (V) = 1.2V + 0.5log (VIN)
where VIN is measured in mVP-P.
This relation translates to a 25mV increase in VRSSI for
every 1dB increase in VIN (25mV/dB). The RSSI output is
reduced approximately 120mV when LOS+ is asserted.
PECL Outputs
The data outputs (OUT+, OUT-) and the MAX3964A/
MAX3968 loss-of-signal outputs (LOS+, LOS-) are sup-
ply-referenced PECL outputs. Standard PECL termina-
tion at each output of 50Ω to (VCC - 2V) is recommended
for best performance.
TTL Outputs
The MAX3965 LOS outputs (LOS+, LOS-) are imple-
mented with open-collector Schottky-clamped TTL-
compatible outputs. The LOS outputs are pulled to VCC
internally with 2kΩ resistors and do not require external
pullup resistors.
Input Offset Correction
A low-frequency feedback loop around the limiting
amplifier improves receiver sensitivity and powerdetec-
tor accuracy. The offset-correction loop’s bandwidth is
determined by an external capacitor (CAZ) connected
between the CZP and CZN pins.
The offset correction is optimized for data streams with
a 50% duty cycle. A different average duty cycle
results in increased pulse-width distortion and loss of
CZN
CZP
OUT+/OUT-
LOS+/LOS-
RSSI
SQUELCH
LOS+
LOS
COMPARATOR
FILTER
IN+/IN-
VCC
VCCO
R1
R2
VTR
SUB
GND
GNDO
(MAX3965 ONLY)
INV
VCC
CFILTER
FWD = FULL-WAVE DETECTOR
CAZ
LIMITER
OFFSET
CORRECTION
LIMITER
I
I
O
LIMITER
LIMITER
FWD
FWD
FWD
FWD
1.2V
REFERENCE
MAX3964A
MAX3965
MAX3968
Figure 1. Functional Diagram


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