3 / 14 page  CY2273A 3 Pin Summary Name Pins (-1, -4) Pins (-2) Pins (-3) Description VDDQ3 6, 14, 19, 30, 36, 48 6, 14, 19, 30, 36, 48 6, 14, 19, 30, 36 3.3V Digital voltage supply VDDQ2 N/A N/A 48 IOAPIC Digital voltage supply, 2.5V VDDCPU 42 42 42 CPU Digital voltage supply, 2.5V or 3.3V AVDD 1 1 23 Analog voltage supply, 3.3V VSS 3, 9, 16, 22, 27, 33, 39, 45 3, 9, 16, 22, 27, 33, 39, 45 3, 9, 16, 22, 27, 33, 39, 45 Ground XTALIN[2] 4 4 4 Reference crystal input XTALOUT[2] 5 5 5 Reference crystal feedback SDRAM7/ PCI_STOP 28 28 28 SDRAM clock output. Also, active low control input to stop PCI clocks, enabled when MODE is LOW. SDRAM6/ CPU_STOP 29 29 29 SDRAM clock output. Also, active low control input to stop CPU clocks, enabled when MODE is LOW. SDRAM5/ PWR_DWN 31 31 31 SDRAM clock output. Also, active low control input to power down device, enabled when MODE is LOW. SDRAM[0:4], [8:11] 38, 37, 35, 34, 32, 21, 20, 18, 17 38, 37, 35, 34, 32, 21, 20, 18, 17 38, 37, 35, 34, 32, 21, 20, 18, 17 SDRAM clock outputs SEL0 26 26 46 CPU frequency select input, bit 0 (See table below.) SEL1 46 46 N/A CPU frequency select input, bit 0 (See table below.) CPUCLK[0:3] 44, 43, 41, 40 44, 43, 41, 40 44, 43, 41, 40 CPU clock outputs PCICLK[0:5] or PCICLK[0:3] 8, 10, 11, 12, 13, 15 8, 10, 11, 12 8, 10, 11, 12, 13, 15 PCI clock outputs, at 30 or 33.33 MHz PCICLK_F 7 7 7 Free-running PCI clock output AGPCLK[0:1] N/A 13, 15 N/A AGP clock outputs at 60 or 66.66 MHz IOAPIC N/A N/A 47 IOAPIC clock output REF0 2 2 2 3.3V Reference clock output USBCLK 47 47 1 USB Clock output at 48 MHz SDATA 23 23 24 Serial data input for serial configuration port SCLK 24 24 25 Serial clock input for serial configuration port MODE 25 25 26 Mode Select pin for enabling power management features Note: 2. For best accuracy, use a parallel-resonant crystal, CLOAD = 18 pF. Function Table (-1, -2 and -4) SEL1 SEL0 CPU/PCI Ratio CPUCLK[0:3] SDRAM[0:11] PCICLK[0:5] PCICLK_F AGP (-2 Only) REF0 IOAPIC USBCLK 0 0 2 60.0 MHz 30.0 MHz 60.0 MHz 14.318 MHz 48 MHz 0 1 2 66.67 MHz 33.33 MHz 66.66 MHz 14.318 MHz 48 MHz 1 0 2.5 75.0 MHz 30.0 MHz 60.0 MHz 14.318 MHz 48 MHz 1 1 2.5 83.33 MHz 33.33 MHz 66.66 MHz 14.318 MHz 48 MHz Function Table (-3) SEL0 CPU/PCI Ratio CPUCLK[0:3]/SDRAM[0:11] PCICLK[0:5],PCICLK_F REF0/IOAPIC USBCLK 0 2 60.0 MHz 30.0 MHz 14.318 MHz 48 MHz 1 2 66.67 MHz 33.33 MHz 14.318 MHz 48 MHz |
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