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HN58X2402 Datasheet(PDF) 9 Page - Hitachi Semiconductor

Part # HN58X2402
Description  Two-wire serial interface 2k / 4k / 8k / 16k / 32k / 64k EEPROM(8-kword x 8-bit)
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Manufacturer  HITACHI [Hitachi Semiconductor]
Direct Link  http://www.renesas.com/eng
Logo HITACHI - Hitachi Semiconductor

HN58X2402 Datasheet(HTML) 9 Page - Hitachi Semiconductor

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HN58X2402/58X2404/58X2408/58X2416/58X2432/58X2464
9
Pin Connections for A0 to A2
Pin connection
Memory size
Max connect
number
A2
A1
A0
Notes
2k bit
8
V
CC/VSS*
1 V
CC/VSS
V
CC/VSS
4k bit
4
V
CC/VSS
V
CC/VSS
×*2
Use A0 for memory address a8
8k bit
2
V
CC/VSS
××
Use A0, A1 for memory address a8 and a9
16k bit
1
×××
Use A0, A1, A2 for memory address a8, a9 and
a10
32k bit
8
V
CC/VSS
V
CC/VSS
V
CC/VSS
64k bit
8
V
CC/VSS
V
CC/VSS
V
CC/VSS
Notes: 1. “V
CC/VSS” means that device address pin should be connected to VCC or VSS.
2.
× = Don’t care (Open is also approval.)
Write Protect (WP)
When the Write Protect pin (WP) is high, the write protection feature is enabled and operates as shown in
the following table. When the WP is low, write operation for all memory arrays are allowed. The read
operation is always activated irrespective of the WP pin status. WP should be fixed high or low during
operations since WP does not provide a latch function.
Write Protect Area
Write protect area
WP pin status 2k bit
4k bit
8k bit
16k bit
32k bit
64k bit
V
IH
Upper 1/2
(1k bit)
Upper 1/2
(2k bit)
Upper 1/2
(4k bit)
Upper 1/2
(8k bit)
Upper 1/4
(8k bit)
Upper 1/4
(16k bit)
V
IL
Normal read/write operation


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