Philips Semiconductors

Preliminary specification

87C54/87C58

CMOS single-chip 8-bit microcontrollers

1996 Aug 16

3-225

DC ELECTRICAL CHARACTERISTICS

TEST

LIMITS

SYMBOL

PARAMETER

CONDITIONS

MIN

MAX

UNIT

Input low voltage, except EA

–0.5

V

Input low voltage to EA

0

V

Input high voltage, XTAL1, RST

V

0.45

V

0.45

V

V

Output high voltage (port 0 in external bus mode),

V

Logical 0 input current, ports 1, 2, 3

–50

µA

See note 4

–650

µA

Input leakage current, port 0

±10

µA

Power supply current (See Figure 11):

Active mode @ 16MHz

See note 10

15

32

mA

Idle mode @ 16MHz

3

5

mA

Power-down mode

10

75

µA

100

µA

Internal reset pull-down resistor

40

225

k

Ω

15

pF

NOTES:

1. Typical ratings are not guaranteed. The values listed are at room temperature, 5V.

to external bus capacitance discharging into the port 0 and port 2 pins when these pins make 1-to-0 transitions during bus operations. In the

worst cases (capacitive loading > 100pF), the noise pulse on the ALE pin may exceed 0.8V. In such cases, it may be desirable to qualify

single output sinks more than 5mA and no more than two outputs exceed the test conditions.

address bits are stabilizing.

4. Pins of ports 1, 2 and 3 source a transition current when they are being externally driven from 1 to 0. The transition current reaches its

6. Load capacitance for port 0, ALE, and PSEN = 100pF, load capacitance for all other outputs = 80pF.

15mA

26mA

71mA

test conditions.

9. Pin capacitance is characterized but not tested. Pin capacitance is less than 25pF. Pin capacitance of ceramic package is less than 15pF

(except EA it is 25pF).