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HD404459 Datasheet(PDF) 11 Page - Renesas Technology Corp |
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HD404459 Datasheet(HTML) 11 Page - Renesas Technology Corp |
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11 / 122 page  HD404459 Series 9 0 1 2 3 Bit 3 Bit 2 Bit 1 Bit 0 IMTD (IM of timer D) IFTD (IF of timer D) IM1 (IM of INT1) IF1 (IF of INT1) IMTB (IM of timer B) IFTB (IF of timer B) IMTA (IM of timer A) IFTA (IF of timer A) IMWU (IM of wakeup) IMTC (IM of timer C) IFTC (IF of timer C) $000 $001 $002 $003 Interrupt control bits area IM0 (IM of INT0) IF0 (IF of INT0) RSP (Reset SP bit) IE (Interrupt enable flag) 32 33 34 35 ICSF (Input capture status flag) IM3 (IM of INT3) IF3 (IF of INT3) IM2 (IM of INT2) IF2 (IF of INT2) IMS (IM of serial) IFS (IF of serial) $020 $021 $022 $023 Register flag area DTON (Direct transfer on flag) CMSF (Comparator start flag) WDON (Watchdog on flag) LSON (Low speed on flag) ICEF (Input capture error flag) RAME (RAM enable flag) Not used IF: IM: SP: Interrupt request flag Interrupt mask Stack pointer Bit 3 Bit 2 Bit 1 Bit 0 IFWU (IF of wakeup) Not used Not used Figure 3 Configuration of Interrupt Control Bits and Register Flag Areas IE IM LSON IF ICSF ICEF RAME RSP WDON CMSF Not used DTON SEM/SEMD REM/REMD TM/TMD Allowed Allowed Allowed Not executed Allowed Allowed Not executed Allowed Inhibited Allowed Not executed Inhibited Allowed Inhibited Allowed Not executed in active mode Allowed Allowed Used in subactive mode Not executed Not executed Inhibited Note: WDON is reset by MCU reset or by STOPC enable for stop mode cancellation. The REM or REMD instuction must not be executed for CMSF during comparator operation. DTON is always reset in active mode. If the TM or TMD instruction is executed for the inhibited bits or non-existing bits, the value in ST becomes undefined. Figure 4 Usage Limitations of RAM Bit Manipulation Instructions |
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