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FWLXTECD0QE000 Datasheet(PDF) 3 Page - Intel Corporation |
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FWLXTECD0QE000 Datasheet(HTML) 3 Page - Intel Corporation |
3 / 226 page Datasheet 3 Document Number: 249241 Revision Number: 007 Revision Date: August 28, 2003 Contents Contents 1.0 Introduction..................................................................................................................................18 1.1 What You Will Find in This Document ................................................................................18 1.2 Related Documents ............................................................................................................18 2.0 Block Diagram .............................................................................................................................19 3.0 Pin/Ball Assignments and Signal Descriptions........................................................................20 3.1 PQFP Pin Assignments ......................................................................................................20 3.1.1 PQFP Pin Assignments – RMII Configuration .......................................................21 3.1.2 PQFP Pin Assignments – SMII Configuration........................................................26 3.1.3 PQFP Pin Assignments – SS-SMII Configuration..................................................31 3.2 PQFP Signal Descriptions ..................................................................................................36 3.2.1 Signal Name Conventions .....................................................................................36 3.2.2 PQFP Signal Descriptions – RMII, SMII, and SS-SMII Configurations..................36 3.3 BGA23 Ball Assignments....................................................................................................51 3.3.1 RMII BGA23 Ball List .............................................................................................52 3.3.2 SMII BGA23 Ball List .............................................................................................62 3.3.3 SS-SMII BGA23 Ball List .......................................................................................72 3.4 BGA23 Signal Descriptions ................................................................................................82 3.4.1 Signal Name Conventions .....................................................................................82 3.4.2 Signal Descriptions – RMII, SMII, and SS-SMII Configurations.............................82 3.5 BGA15 Ball Assignments....................................................................................................98 3.5.1 BGA15 Ball List......................................................................................................99 3.6 BGA15 Signal Descriptions ..............................................................................................109 3.6.1 Signal Name Conventions ...................................................................................109 3.6.2 Signal Descriptions – SMII and SS-SMII Configurations .....................................109 4.0 Functional Description..............................................................................................................116 4.1 Introduction .......................................................................................................................116 4.1.1 OSP™ Architecture .............................................................................................116 4.1.2 Comprehensive Functionality ..............................................................................117 4.1.2.1 Sectionalization....................................................................................117 4.2 Interface Descriptions .......................................................................................................117 4.2.1 10/100 Network Interface.....................................................................................117 4.2.1.1 Twisted-Pair Interface ..........................................................................118 4.2.1.2 MDI Crossover (MDIX).........................................................................119 4.2.1.3 Fiber Interface......................................................................................119 4.3 Media Independent Interface (MII) Interfaces...................................................................119 4.3.1 Global MII Mode Select .......................................................................................119 4.3.2 Internal Loopback ................................................................................................120 4.3.3 RMII Data Interface..............................................................................................120 4.3.4 Serial Media Independent Interface (SMII) and Source Synchronous- Serial Media Independent Interface (SS-SMII) ....................................................121 4.3.4.1 SMII Interface.......................................................................................121 4.3.4.2 Source Synchronous-Serial Media Independent Interface ..................121 4.3.5 Configuration Management Interface ..................................................................121 4.3.6 MII Isolate ............................................................................................................121 |
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