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IRMCK201 Datasheet(PDF) 11 Page - International Rectifier |
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IRMCK201 Datasheet(HTML) 11 Page - International Rectifier |
11 / 62 page IRMCK201 This document is the property of International Rectifier and may not be copied or distributed without expressed consent. 11 Motion Peripheral Group Signal Input (I) / Output (O) Low (L) / High (H) True Asserted Function PWMUH O PWM phase U high side PWMUL O PWM phase U low side PWMVH O PWM phase V high side PWHVL O PWM phase V low side PWMWH O PWM phase W high side PWMWL O Varies, Based on Write Register 0x0D PWM phase W low side BRAKE O L IGBT gate GATEKILL I Varies, Based on Write Register 0x0C Bit 7 When asserted, negates all six PWM signals, host writeable IFB0 I - Channel 0 (phase V) IFB1 I - Channel 1 (phase W) ENA I - Encoder A ENB I - Encoder B ENZ I - Encoder Z HALLA I - Hall A HALLB I - Hall B HALLC I - Hall C Analog Interface Group Signal Input (I) / Output (O) Low (L) / High (H) True Asserted Function ADCLK O Negative Edge Sensitive Clock to ADS7818 ADOUT I - Serial data from ADS7818 DAC [3:0] O - Diagnostic DAC ADCONVST O L Conversion start to ADS7818 ADMUX0 O H Analog input mux select ADMUX1 O H Analog input mux select |
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