MC54HC273A datasheet(4/7 Pages) MOTOROLA

Part #	MC54HC273A

Description	OCTAL D FLIP-FLOP WITH COMMON CLOCK AND RESET

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Manufacturer	MOTOROLA [Motorola, Inc]

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4 / 7 page

MC54/74HC273A

MOTOROLA

High–Speed CMOS Logic Data

DL129 — Rev 6

3–4

TIMING REQUIREMENTS (CL = 50 pF, Input tr = tf = 6.0 ns)

Sb l

P

Fi

V

Guaranteed Limit

Ui

Sb l

P

Fi

VCC

– 55 to 25

_C

v 85_C

v 125_C

Ui

Symbol

Parameter

Fig.

VCC

Volts

Min

Max

Min

Max

Min

Max

Unit

tsu

Minimum Setup Time, Data to Clock

3

2.0

3.0

4.5

6.0

60

23

12

10

75

27

15

13

90

32

18

15

ns

th

Minimum Hold Time, Clock to Data

3

2.0

3.0

4.5

6.0

3.0

ns

trec

Minimum Recovery Time, Reset Inactive to

Clock

2

2.0

3.0

4.5

6.0

5.0

ns

tw

Minimum Pulse Width, Clock

1

2.0

3.0

4.5

6.0

60

23

12

10

75

27

15

13

90

32

18

15

ns

tw

Minimum Pulse Width, Reset

2

2.0

3.0

4.5

6.0

60

23

12

10

75

27

15

13

90

32

18

15

ns

tr, tf

Maximum Input Rise and Fall Times

1

2.0

3.0

4.5

6.0

1000

800

500

400

1000

800

500

400

1000

800

500

400

ns

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MC54HC273A Datasheet(PDF) 4 Page - Motorola, Inc

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