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PHILIPS |
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5 page
1999 Apr 26 5 Philips Semiconductors Product specification PNP Darlington transistor BSR62 PACKAGE OUTLINE UNIT A REFERENCES OUTLINE VERSION EUROPEAN PROJECTION ISSUE DATE IEC JEDEC EIAJ mm 5.2 5.0 b 0.48 0.40 c 0.45 0.40 D 4.8 4.4 d 1.7 1.4 E 4.2 3.6 L 14.5 12.7 e 2.54 e1 1.27 L1 (1) 2.5 b1 0.66 0.56 DIMENSIONS (mm are the original dimensions) Note 1. Terminal dimensions within this zone are uncontrolled to allow for flow of plastic and terminal irregularities. SOT54 TO-92 SC-43 97-02-28 A L 0 2.5 5 mm scale b c D b1 L1 d E Plastic single-ended leaded (through hole) package; 3 leads SOT54 e1 e 1 2 3 |