ISP1504A datasheet(6/84 Pages) PHILIPS

Part #	ISP1504A

Description	ULPI Hi-Speed Universal Serial Bus On-The-Go transceiver

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Manufacturer	PHILIPS [NXP Semiconductors]

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6 / 84 page

ISP1504A_ISP1504C_1

Product data sheet

Rev. 01 — 19 October 2006

6 of 84

NXP Semiconductors

ISP1504A; ISP1504C

ULPI HS USB OTG transceiver

[1]

Symbol names ending with underscore N, for example, NAME_N, indicate active LOW signals.

[2]

For details on external components required on each pin, see bill of materials and application diagrams in Section 16.

[3]

I = input; O = output; I/O = digital input/output; OD = open-drain output; AI = analog input; AO = analog output; AI/O = analog

input/output; P = power or ground pin.

[4]

A detailed description of these pins can be found in Section 7.9.

VBUS

13

AI/O

VBUS pin of the USB cable

5 V tolerant

REG3V3

14

P

3.3 V regulator output

XTAL1

15

AI

crystal oscillator or clock input

XTAL2

16

AO

crystal oscillator output

RESET_N

17

I

active LOW, asynchronous reset input

plain input

REG1V8

18

P

1.8 V regulator output

DIR

19

O

ULPI direction signal

slew-rate controlled output (1 ns)

STP

20

I

ULPI stop signal

plain input; programmable pull up

NXT

21

O

ULPI next signal

slew-rate controlled output (1 ns)

VCC(I/O)

22

P

I/O supply rail

DATA7

23

I/O

pin 7 of the bidirectional ULPI data bus

slew-rate controlled output (1 ns); plain input; programmable pull down

DATA6

24

I/O

pin 6 of the bidirectional ULPI data bus

slew-rate controlled output (1 ns); plain input; programmable pull down

DATA5

25

I/O

pin 5 of the bidirectional ULPI data bus

slew-rate controlled output (1 ns); plain input; programmable pull down

DATA4

26

I/O

pin 4 of the bidirectional ULPI data bus

slew-rate controlled output (1 ns); plain input; programmable pull down

CLOCK

27

I/O

60 MHz clock output when a crystal is attached; requires 60 MHz clock input when

the crystal is not attached

slew-rate controlled output (1 ns); plain input

DATA3

28

I/O

pin 3 of the bidirectional ULPI data bus

slew-rate controlled output (1 ns); plain input; programmable pull down

CHIP_SELECT_

N

29

I

active LOW chip select

plain input

VCC(I/O)

30

P

I/O supply rail

DATA2

31

I/O

pin 2 of the bidirectional ULPI data bus

slew-rate controlled output (1 ns); plain input; programmable pull down

DATA1

32

I/O

pin 1 of the bidirectional ULPI data bus

slew-rate controlled output (1 ns); plain input; programmable pull down

GND

die

pad

P

ground supply; down bonded to the exposed die pad (heat sink); to be connected to

the PCB ground

Table 2.

Pin description …continued

Symbol[1][2]

Type[3]

Description[4]

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